Vivado-zynq7000 的PS侧开发相关文档

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UG940   Vivado Design SuiteTutorialEmbedded Processor HardwareDesign

Table of Contents
Revision History ......................................................................................................................................................2
Programming and Debugging Embedded Processors................................................................................................5
Overview.................................................................................................................................................................5
Hardware and Software Requirements..................................................................................................................5
Tutorial Design Descriptions...................................................................................................................................5
Locating Tutorial Design Files.................................................................................................................................7
Lab 1: Building a Zynq-7000 AP SoC Processor Design...............................................................................................8
Introduction............................................................................................................................................................8
Step 1: Start the Vivado IDE and Create a Project..................................................................................................8
Step 2: Create an IP Integrator Design ................................................................................................................ 10
Step 3: Debugging the Block Design.................................................................................................................... 17
Step 4: Generate HDL Design Files ...................................................................................................................... 20
Step 5: Implement Design and Generate Bitstream............................................................................................ 22
Step 6: Export Hardware to SDK.......................................................................................................................... 23
Step 7: Create a Software Application................................................................................................................. 24
Step 8: Run the Software Application ................................................................................................................. 26
Step 9: Connect to the Vivado Logic Analyzer..................................................................................................... 30
Conclusion ........................................................................................................................................................... 36
Lab Files..........................................................................................................