关于CSAPP读到的一些(1)——Alignment(出自Machine-Level Representation of Program)

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话说从来没有考虑过变量定义的顺序会给程序运行时候的效率造成多大的影响。原来一直都比较天真,暑假开始看了CSAPP,类似于计算机体系结构,但是是从编程的角度来写的,现在还在和影印版死磕中,用了一个多礼拜的时间总算读完了Machine-Level Representation of Program这一章,脑袋里面只剩下。。。GCC。。。和汇编语言。。。汗。。不过编译器真的很强大,直接造成我们只管写代码,不管底层的操作之类的习惯。

今天读到data alignment的时候才发现,原来。。在struct里面定义不同变量的时候往往顺序的不同,造成的内存分配也是不一样的,内部各个变量的偏移位置也是不同的。此处,linux和windows的规定又是不一样的。

之所以会有对齐限制(Limit Alignment)完全是为了简化存储和CPU之间的硬件接口的设计难度。

linux下,小类型的alignment为2的倍数,即short之类的类型,偏移位置必须得从2的倍数大小开始,而其他的大类型变量的偏移位置需要从4的倍数开始偏移。例如:

struct MixedData
{
    int Data1;      
    short Data2;
    int Data3;
};

Data1的偏移量为0,Data2的偏移量为4,Data3的偏移量就为8。gcc在翻译这段代码的时候会自己在Data2和Data3之间插入2Byte的空间以达到linux的偏移限制。而若将此结构体定义为

struct MixedData
{
    int Data1;
    int Data3;
    short Data2;
};

则分配的内存空间和前一个结构体就是完全不一样的。

在windows下面这种限制更为严格。基本是按照若一个类型的大小是M Byte,那么该类型变量在结构体中的偏移量只能是M的倍数,即N*M的偏移位置。所以win下结构体中定义的变量顺序会导致的内存浪费比较多。

嗯。。其实这一章还有比较重要的地方在于递归调用的时候系统各个处理器的处理情况其汇编语言的写法。。。但是这个比较常见了。。。

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Intel’s IA32 instruction set architecture (ISA), colloquially known as “x86”, is the dominant instruction format for the world’s computers. IA32 is the platform of choice for most Windows, Linux, and, since 2006, even Macintosh computers. The ISA we use today was defined in 1985 with the introduction of the i386 microprocessor, extending the 16-bit instruction set defined by the original 8086 to 32 bits. Even though subsequent processor generations have introduced new instruction types and formats, many compilers, including GCC, have avoided using these features in the interest of maintaining backward compatibility. A shift is underway to a 64-bit version of the Intel instruction set. Originally developed by Advanced Micro Devices (AMD) and named x86-64, it is now supported by high end processors from AMD (who now call it AMD64) and by Intel, who refer to it as Intel64. Most people still refer to it as “x86-64,” and we follow this convention. (Some vendors have shortened this to simply “x64”). Newer versions of Linux and GCC support this extension. In making this switch, the developers of GCC saw an opportunity to also make use of some of the instruction-set features that had been added in more recent generations of IA32 processors. This combination of new hardware and revised compiler makes x86-64 code substantially different in form and in performance than IA32 code. In creating the 64-bit extension, the AMD engineers also adopted some of the features found in reduced-instruction set computers (RISC) [7] that made them the favored targets for optimizing compilers. For example, there are now 16 general-purpose registers, rather than the performancelimiting eight of the original 8086. The developers of GCC were able to exploit these features, as well as those of more recent generations of the IA32 architecture, to obtain substantial performance improvements. For example, procedure parameters are now passed via registers rather than on the stack, greatly reducing the number of memory read and write operations. This document serves as a supplement to Chapter 3 of Computer Systems: A Programmer’s Perspective (CS:APP), describing some of the differences. We start with a brief history of how AMD and Intel arrived at x86-64, followed by a summary of the main features that distinguish x86-64 code from IA32 code, and then work our way through the individual features.
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