NVDLA HW仿真指南

本文记录基于Verilator的NVDLA HW仿真流程，针对nvdla/hw/nvdla1分支的nv_full设置。

编译生成make文件

进入./hw文件

cd ./hw

运行Makefile

make

设置对应的路径（以下是我的docker容器的设置，如使用自己的容器，需手动调整）

##======================= 										  
## Project Name Setup, multiple projects supported			  	  
##======================= 										  
PROJECTS := nv_full
  																  
##======================= 										  
##Linux Environment Setup 										  
##======================= 										  
  																  
USE_DESIGNWARE  := 0
#DESIGNWARE_DIR  := /home/tools/synopsys/syn_2011.09/dw/sim_ver
CPP  := /usr/bin/cpp
GCC  := /usr/bin/g++
CXX  := /usr/bin/g++
PERL := /usr/bin/perl
JAVA := /usr/bin/java
SYSTEMC := /usr/local/systemc-2.3.0
PYTHON := /usr/bin/python
#VCS_HOME := /home/tools/vcs/mx-2016.06-SP2-4
#NOVAS_HOME := /home/tools/debussy/verdi3_2016.06-SP2-9
#VERDI_HOME := /home/tools/debussy/verdi3_2016.06-SP2-9
VERILATOR := /usr/local/bin/verilator
CLANG := /usr/local/bin/clang

对应工具的版本如下：
SystemC version = 2.3.0

gcc --version
gcc (Ubuntu 4.8.5-4ubuntu2) 4.8.5
Copyright (C) 2015 Free Software Foundation, Inc.
This is free software; see the source for copying conditions.  There is NO
warranty; not even for MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.

g++ --version
g++ (Ubuntu 4.8.5-4ubuntu2) 4.8.5
Copyright (C) 2015 Free Software Foundation, Inc.
This is free software; see the source for copying conditions.  There is NO
warranty; not even for MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.

perl --version
This is perl 5, version 22, subversion 1 (v5.22.1) built for x86_64-linux-gnu-thread-multi
(with 58 registered patches, see perl -V for more detail)

java -version
openjdk version "1.8.0_151"
OpenJDK Runtime Environment (build 1.8.0_151-8u151-b12-0ubuntu0.16.04.2-b12)
OpenJDK 64-Bit Server VM (build 25.151-b12, mixed mode)

python --version
Python 2.7.12

verilator --version
Verilator 4.040 2020-08-15 rev v4.040

clang --version
clang version 3.4 (tags/RELEASE_34/final)
Target: x86_64-unknown-linux-gnu
Thread model: posix

生成verilog代码和verilator仿真所需文件

生成vmod代码

./tools/bin/tmake -build vmod

生成verilator仿真文件

./tools/bin/tmake -build verilator

此处需要至少20G的内存来确保编译完成，否则会出现threw signal 9的错误。我在verif/verilator/Makefile中1) 添加了PROJECT = nv_full设置，然后将剩下所有nv_small或者nv_full全部由$(PROJECT)替代，2) 在verilator报错时，添加-Wno-TIMESCALEMOD参数来忽略timescale错误。如果上一步报错，可以考虑如此设置。

完成之后./hw/outdir/nv_full/verilator下面会出现VNV_dla.mk文件以及VNV_nvdla文件夹。

生成测试所需.bin文件

选择希望仿真的测试（在verif/verilator/traces/traceplayer下面），并运行以下命令。此处选择sanity0

cd ./verif/verilator
make ../../outdir/nv_full/verilator/test/sanity0/trace.bin

成功运行后，在./outdir/nv_full/verilator/test/sanity0下会出现trace.bin文件。

运行仿真

root@xxxxxxx:/vp/hw/verif/verilator: make run TEST=sanity0
CMD: read_reg ffff100b ffffffe0 00000000
CMD: write_reg ffff100b f0a5a500
CMD: read_reg ffff100b ffffffe0 f0a5a500
CMD: done
reset...
letting buffers clear after reset...
running trace...
(8272) read from nvdla: addr ffff100b
(8308) read response from nvdla: 00000000
(8310) write to nvdla: addr ffff100b, data f0a5a500
(8312) read from nvdla: addr ffff100b
(8348) read response from nvdla: f0a5a500
done at 8750 ticks
*** PASS

测试文件本质上是在trace/traceplayer下面的.txn文件，具体实现方式是读写寄存器方式。