distributor之Interrupt Set-Enable Registers, GICD_ISENABLERn

相对于distributor基地址偏移区间在0x100-0x17C,此寄存器就是把对应的中断使能，使之可以被触发上报处理器；此寄存器是写0无效的，所以在写此寄存器时可以直接写，不用再先读再或再写了；对应bit写1即代表使能；如何计算某一个中断对应哪个寄存器的哪个bit位呢？方法如下：

比如中断号是 m, when DIV and MOD are the integer division and modulo operations:

the corresponding GICD_ISENABLER number,n, is given byn=m DIV 32

the offset of the required GICD_ISENABLER is (0x100+ (4*n))
the bit number of the required Set-enable bit in this register is mMOD 32.