在调试DM8168时使用的SDK是DVRRDK_04.01.00.02 开发包
遇到的问题是在uboot中数据colorbar命令 HDMI以及VGA中并没有显示彩条,
另外在系统程序中,通过执行./init.sh 与 ./load.sh 脚本后通过设置寄存器 devmem2 0x48108000 w 0x4403A033 也同样没有彩条显示,但是HDMI可以显示,同样的运行demo程序时VGA出现闪屏一会又信号一会没有信号的现象
解决步骤:
通过查找资料
http://www.deyisupport.com/question_answer/dsp_arm/davinci_digital_media_processors/f/39/t/70909.aspx
http://www.deyisupport.com/question_answer/dsp_arm/davinci_digital_media_processors/f/39/t/53258.aspx
通过这两篇文章的介绍 在系统命令行中 以此的输入
echo 0 > /sys/devices/platform/vpss/graphics0/enabled
echo 0 > /sys/devices/platform/vpss/display0/enabled //关闭HDMI显示
echo 0 > /sys/devices/platform/vpss/display1/enabled
echo 0 > /sys/devices/platform/vpss/display2/enabled
echo 0 > /sys/devices/platform/vpss/display3/enabled //关闭VGA显示
echo component,rgb888 > /sys/devices/platform/vpss/display3/output
echo 1280x720@60 > /sys/devices/platform/vpss/display3/mode
echo 74250,1280/110/220/40,720/5/20/5,1 > /sys/devices/platform/vpss/display3/timings
echo 1 > /sys/devices/platform/vpss/display3/enabled //使能
echo 1:hdcomp > /sys/devices/platform/vpss/graphics0/nodes
echo 1 > /sys/devices/platform/vpss/graphics0/enabled
最后输入
devmem2 0x48108000 w 0x4403A033
此时VGA上可以输入彩条
在这时候就可以通过
root@dm816x:/opt/dvr_rdk/ti816x# ./pll_print.out
可以查看pll设置的时钟,记录下来
//===================================================
这个是在uboot输入colorbar后正常启动进入系统通过pll_print.out 打印的内容
在cmd_logo_816x.c 文件中
VideoPLL(0x6E, 0x2, 0xB, 0x0, 0x5, 0xF, 0xB6DB6D, 0x1E, 0xF, 0xB6DB6D, 0x1E, 0x0, 0x0);
最后输入的pll如下
SYSCLK11 (Video) Freq : 216.00 MHz
MAIN_N : 110
PREDIV : 2
INTFREQ : 11
FRACFREQ : 0.00
FREQ : 11.00
MDIV : 5
Freq Reg : 0x9B000000
SYSCLK13 (HD_VENC_D_CLK) Freq : 25.20 MHz
MAIN_N : 110
PREDIV : 2
INTFREQ : 15
FRACFREQ : 0.71
FREQ : 15.71
MDIV : 30
Freq Reg : 0x9FB6DB6D
SYSCLK15 (HD_VENC_A_CLK) Freq : 25.20 MHz
MAIN_N : 110
PREDIV : 2
INTFREQ : 15
FRACFREQ : 0.71
FREQ : 15.71
MDIV : 30
Freq Reg : 0x9FB6DB6D
//===================================================
通过脚本输入的设置720P打印的pll如下
SYSCLK11 (Video) Freq : 216.00 MHz
MAIN_N : 110
PREDIV : 2
INTFREQ : 13
FRACFREQ : 0.75
FREQ : 13.75
MDIV : 4
Freq Reg : 0x8DC00000
SYSCLK13 (HD_VENC_D_CLK) Freq : 148.50 MHz
MAIN_N : 110
PREDIV : 2
INTFREQ : 10
FRACFREQ : 0.00
FREQ : 10.00
MDIV : 8
Freq Reg : 0x8A000000
SYSCLK15 (HD_VENC_A_CLK) Freq : 74.25 MHz
MAIN_N : 110
PREDIV : 2
INTFREQ : 10
FRACFREQ : 0.00
FREQ : 10.00
MDIV : 16
Freq Reg : 0x8A000000
//===================================================
通过比较规律
修改了cmd_logo_816x.c中的VideoPLL数值入下
VideoPLL(0x6E, 0x2, 0xD, 0xC00000, 0x4, 0xA, 0x000000, 0x10, 0xA, 0x000000, 0x10, 0x0, 0x0);
修改
VideoPLL函数中的内容
/*Program the Video PLL to generate SYSCLK11 (RF Modulator), SYSCLK17 (SD_VENC), and STC1 source clocks*/
- WR_MEM_32(VIDEOPLL_FREQ1, (1<<31)|(1<<28)|(VIDEO_INTFREQ1<<24)| VIDEO_FRACFREQ1);
+ //WR_MEM_32(VIDEOPLL_FREQ1, (1<<31)|(1<<28)|(VIDEO_INTFREQ1<<24)| VIDEO_FRACFREQ1);
+ WR_MEM_32(VIDEOPLL_FREQ1, (1<<31)|(VIDEO_INTFREQ1<<24)| VIDEO_FRACFREQ1);
/*Program Video PLL SYSCLK11 Post divider register*/
WR_MEM_32(VIDEOPLL_DIV1, (1<<8)|VIDEO_MDIV1);
/*Program the PLL to generate SYSCLK13 (HD_VENC_D clock) and STC0/STC1 source clocks */
- WR_MEM_32(VIDEOPLL_FREQ2, (1<<31)|(1<<28)|(VIDEO_INTFREQ2<<24)|VIDEO_FRACFREQ2);
+ //WR_MEM_32(VIDEOPLL_FREQ2, (1<<31)|(1<<28)|(VIDEO_INTFREQ2<<24)|VIDEO_FRACFREQ2);
+ WR_MEM_32(VIDEOPLL_FREQ2, (1<<31)|(VIDEO_INTFREQ2<<24)|VIDEO_FRACFREQ2);
WR_MEM_32(VIDEOPLL_DIV2, (1<<8)|VIDEO_MDIV2);
/*Program the PLL to generate SYSCLK13 and STC0/STC1 source clocks */
- WR_MEM_32(VIDEOPLL_FREQ3, (1<<31)|(1<<28)|(VIDEO_INTFREQ3<<24)|VIDEO_FRACFREQ3);
+ //WR_MEM_32(VIDEOPLL_FREQ3, (1<<31)|(1<<28)|(VIDEO_INTFREQ3<<24)|VIDEO_FRACFREQ3);
+ WR_MEM_32(VIDEOPLL_FREQ3, (1<<31)|(VIDEO_INTFREQ3<<24)|VIDEO_FRACFREQ3);
WR_MEM_32(VIDEOPLL_DIV3, (1<<8)|VIDEO_MDIV3);
此时设置的显示为1280*720 720P
configVenc(0x6000, 0x2, argv[0], 1280, 110, 220, 40, 720, 5, 20, 5);
configVenc(0x8000, 0x0, argv[0], 1280, 110, 220, 40, 720, 5, 20, 5);
configVenc(0xA000, 0x1, argv[0], 1280, 110, 220, 40, 720, 5, 20, 5);
修改configVenc函数中的内容
+#if 0
/*remove SOG for HDCOMP*/
if ((venc_offset == 0x8000) && (!useEmbeddedSync)) {
vps_write32(venc_offset + 0x1c, 0xb00);
@@ -568,7 +573,10 @@ void configVenc(int venc_offset, int useEmbeddedSync, char cmd[], int act_pix, i
vps_write32(venc_offset + 0x20, 0x1C0C0C30);
vps_write32(venc_offset + 0x24, 0x1C0C0C30);
}
-
+#endif
+ vps_write32(venc_offset + 0x1c, 0x184C0C77);
+ vps_write32(venc_offset + 0x20, 0x1C0C0C30);
+ vps_write32(venc_offset + 0x24, 0x1C0C0C30);
另外因为我调试的板子上没有sii9022a 所以讲colorbar中的内容注释掉了
同时修改include/logo_816x.h
--- a/include/logo_816x.h
+++ b/include/logo_816x.h
@@ -5,8 +5,8 @@
#include <asm/arch/sys_proto.h>
#include <i2c.h>
-#define CONFIG_480p
-
+//#define CONFIG_480p
+#define CONFIG_720p
/* We will program the BOOT_LOGO_DISPLAY_TIME_IN_SECS*BOOT_LOGO_DISPLAY_FPS
VPDMA descriptors
@@ -33,7 +33,8 @@
#define COLORBAR_MODE 1
#define NORMAL_MODE 0
-#define DEBUG_VPSS
+#define DEBUG_VPSS 1
+#define DEBUG_BMP 1
#define TI816X_HDMI_8BIT_720_60_16_9_HD {\
通过编译后,在uboot命令行中输入colorbar时VGA与HDMI同事输入彩条
通过加载logo文件
setenv serverip 192.168.1.241 && setenv ipaddr 192.168.1.61 && tftp 0x81000000 lz/1280720.bmp && logo on 0x81000000 0xA0000000 0x81600000 40 60
可以显示logo
这是在来进入系统,通过运行run_dvr.sh 的demo, 此时通过输入
devmem2 0x4810801c w 0x184C0C77
devmem2 0x48108020 w 0x1C0C0C30
devmem2 0x48108024 w 0x1C0C0C30
这时就可以正常的在HDMI与VGA上显示相同的内容了
剩下的就得一点点找代码修改这几个寄存器的值了