硬件描述语言实验七：译码器实验

实验要求：设计一个显示十六进制数字的LED数码管译码电路，实体名称为“transcode_led”，其输入与输出的逻辑关系如下表所示。

输入				输出
code_input(4位)				a	b	c	d	e	f	g	dp
0	0	0	0	0	0	0	0	0	0	1	1
0	0	0	1	1	0	0	1	1	1	1	1
1	1	1	1	0	1	1	1	0	0	0	1

library ieee;
use ieee.std_logic_1164.all;

entity transcode_led is
port(  code_input:in std_logic_vector(3 downto 0);
      output:out std_logic_vector(7 downto 0);
		inv:out std_logic
);
end entity;

architecture rtl of transcode_led is
begin
inv<='0';
process(code_input) is 
begin
case code_input is 
   when"0000"=>output<="00000011";
	when"0001"=>output<="10011111";
	when"0010"=>output<="00100111";
	when"0011"=>output<="00001101";
	when"0100"=>output<="10011001";
	when"0101"=>output<="01001001";
	when"0110"=>output<="01000001";
	when"0111"=>output<="00011111";
	when"1000"=>output<="00000001";
	when"1001"=>output<="00001001";
	when"1010"=>output<="00010001";
	when"1011"=>output<="11000001";
	when"1100"=>output<="01100011";
	when"1101"=>output<="10000101";
	when"1110"=>output<="01100001";
	when"1111"=>output<="01110001";
	when others=>inv<='1';
	end case;
end process;
end rtl;