RGB2VGA#RGB2YUV

RGB TO VGA fpga IP 模块 ，已封装为VIVADO ip

// An highlighted block
entity rgb2vga is[code=text][/code]
Generic (
   VID_IN_DATA_WIDTH : natural := 24;
   kRedDepth : natural := 5;
   kGreenDepth : natural := 6;
   kBlueDepth : natural := 5
);
Port (
   rgb_pData : in std_logic_vector(VID_IN_DATA_WIDTH-1 downto 0);
   rgb_pVDE : in std_logic;
   rgb_pHSync : in std_logic;
   rgb_pVSync : in std_logic;
   
   PixelClk : in std_logic; --pixel clock
   
   vga_pRed : out std_logic_vector(kRedDepth-1 downto 0);
   vga_pGreen : out std_logic_vector(kGreenDepth-1 downto 0);
   vga_pBlue : out std_logic_vector(kBlueDepth-1 downto 0);
   vga_pHSync : out std_logic;
   vga_pVSync : out std_logic
);
end rgb2vga;