豪威笔试题

本文分享了Omnivision在2005年职业 fair 上的笔试题,涵盖了逻辑设计、物理设计和架构设计等多个方面的问题。题目包括FIFO深度计算、组合电路延迟处理、无毛刺时钟生成、时序参数设定、随机移动概率、时钟重叠次数等,同时也探讨了布局检查、解决天线效应、LVS原理、时钟偏斜控制、电源规划对芯片性能的影响,以及JPEG压缩、硬件乘法器实现和队列堆栈的数据结构等。文章适合电子工程和计算机科学专业的求职者参考。
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Omnivision examiner use only
2005 china career fair exam
1 logic design
1.there is a fifo design which the clock of data input is running at 100mhz,w
hile the clock of data output is running at 80mhz.the input data is a fix patt
ern .800 input clocks carry in 800 data continuously,and the other 200 clocks
carry in no data.how big the fifo should be in order to avoid data over/under_
run?please select the minimum depth below to meet the requirement.
A.160 b.200 c.800 d .1000
2.supposedly there is acombinational circuit between two registers driven by a
clock.what will you do if the delay of the combinational circuit is greater t
han the clock signal?
a.to reduce clock frequency b.to increase clock frequency
c.to make it pipelining d to make it multi_cycle
3.which of the follow circuits can generate gitch free gated_clk?

 

a.always@(posed

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