qemu-system-aarch64 virt添加sdhci

static void create_sdhci(const VirtMachineState *vms, MemoryRegion *mem)

{

    MachineState *ms = MACHINE(vms);

    SysBusDevice *busdev;

    DeviceState *dev;

    DeviceState *carddev;

    BlockBackend *blk;

    DriveInfo *di;

    hwaddr base = vms->memmap[VIRT_SDHCI].base;

    hwaddr size = vms->memmap[VIRT_SDHCI].size;

    int irq = vms->irqmap[VIRT_SDHCI];

    char *nodename;

    const char compat[] = "arasan,sdhci-8.9a";

    /* Compatible with:

        * - SD Host Controller Specification Version 2.0

        * - SDIO Specification Version 2.0

        * - MMC Specification Version 4.3

        * - SDMA

        * - ADMA2

        *

        * As this part of the Exynos4210 is not publically available,

        * we used the "HS-MMC Controller S3C2416X RISC Microprocessor"

        * public datasheet which is very similar (implementing

        * MMC Specification Version 4.0 being the only difference noted)

        */

    dev = qdev_new(TYPE_S3C_SDHCI);

    qdev_prop_set_uint64(dev, "capareg", 0x05E80080);

    busdev = SYS_BUS_DEVICE(dev);

    sysbus_realize_and_unref(busdev, &error_fatal);

    //sysbus_mmio_map(busdev, 0, EXYNOS4210_SDHCI_ADDR(n));

     memory_region_add_subregion(mem, base,

                                sysbus_mmio_get_region(busdev, 0));

    //sysbus_connect_irq(busdev, 0, s->irq_table[exynos4210_get_irq(29, n)]);

    sysbus_connect_irq(busdev, 0, qdev_get_gpio_in(vms->gic, irq));

    di = drive_get(IF_SD, 0, 0);

    blk = di ? blk_by_legacy_dinfo(di) : NULL;

    carddev = qdev_new(TYPE_SD_CARD);

    qdev_prop_set_drive(carddev, "drive", blk);

    qdev_realize_and_unref(carddev, qdev_get_child_bus(dev, "sd-bus"),

                            &error_fatal);

    nodename = g_strdup_printf("/sdhci@%" PRIx64, base);

    qemu_fdt_add_subnode(ms->fdt, nodename);

    /* Note that we can't use setprop_string because of the embedded NUL */

    qemu_fdt_setprop(ms->fdt, nodename, "compatible",

                         compat, sizeof(compat));

    qemu_fdt_setprop_sized_cells(ms->fdt, nodename, "reg",

                                     2, base, 2, size);

    qemu_fdt_setprop_cells(ms->fdt, nodename, "interrupts",

                               GIC_FDT_IRQ_TYPE_SPI, irq,

                               GIC_FDT_IRQ_FLAGS_LEVEL_HI);

    return;

}

static const int a15irqmap[] = {

    [VIRT_UART] = 1,

……    

    [VIRT_SDHCI] = 11,

……

};

static const MemMapEntry base_memmap[] = {

    /* Space up to 0x8000000 is reserved for a boot ROM */

    [VIRT_FLASH] =              {          0, 0x08000000 },

……

    [VIRT_SDHCI] =              { 0x0b010000, 0x00010000 },

……

};