MCP2515无BUG版本驱动(C文件)

#include "mcp2515.h"
/*RXB0's data registers:*/
unsigned char RXB0D[8]={RXB0D0,RXB0D1,RXB0D2,RXB0D3,RXB0D4,RXB0D5,RXB0D6,RXB0D7};
/*TXB0's data registers:*/
unsigned char TXB0D[8]={TXB0D0,TXB0D1,TXB0D2,TXB0D3,TXB0D4,TXB0D5,TXB0D6,TXB0D7};

void MCP2515_Init(void)
{
    unsigned char dummy;
    /*First initialize the SPI periphere*/
    /*Then initialize the MCP2515.Step as follow:
    1>Get into configuration mode by reset MCP2515 or write the bit of CANCTRL.REQOP.
    2>Check the CANSTAT by ReadByte_MCP2515(CANSTAT) if MCP2515 is already into configuration mode.
    3>Configurate the registers to set the baudrate:CN1,CN2,CN3.
    4>Configurate TXRTSCTRL to set the function of TXnRTS pin.
    5>Configurate TRXBnCTRL to set the pirority of transmit mailbox:TXB0,TXB1,TXB2.
    6>Configurate TXBn'SID ,EID and DLC.This step can configurate when you are in normal mode.
    7>Configurate RXFnSIDH and RXFnSIDL to resceive the specific ID.
    8>Configurate RXMnSIDH and RXMnSIDL to mask the RXFnSID's ID.
    9>Configurate CANINTE to enable or disable the interrupts.
    10>Return to the normal mode and double check if it is return to the normal mode by CANSTAT.
    */   

    /*Flip into the Configuration Mode*/
    MCP2515_Reset();
    _delay_(0x4000);/* 1ms _delay_ using Fcpu = 16Mhz*/

    //Set the baudrate
    //set CNF1,SJW=00,lengthe is 1TQ,BRP=49,TQ=[2*(BRP+1)]/Fsoc=2*50/8M=12.5us
    SendByte_MCP2515(CNF1,CAN_125Kbps);
    //set CNF2,SAM=0,caputre one time,PHSEG1=(2+1)TQ=3TQ,PRSEG=(0+1)TQ=1TQ
    SendByte_MCP2515(CNF2,0x80|PHSEG1_3TQ|PRSEG_1TQ);
    //set CNF3,PHSEG2=(2+1)TQ=3TQ,when CANCTRL.CLKEN=1,set CLKOUT pin to output
    SendByte_MCP2515(CNF3,PHSEG2_3TQ);
    /*
    3 Transimit Buffers:TXB0,TXB1,TXB2
    2 Receive   Buffers:RXB0,RXB1
    6 ID Filter:RXF0~RXF5
    2 ID Mask Regieter:RXM0,RXM1
    */
     //configurate RXB0' registers
//     SendByte_MCP2515(RXB0CTRL,0x60);//Receive all frames from CAN bus
    SendByte_MCP2515(RXB0CTRL,0x20);//RXB0 just receive the standard frames 
     SendByte_MCP2515(RXF0SIDH,0xFF);//Fileter register
     SendByte_MCP2515(RXF0SIDL,0xE0);//Just receive ID=0x7FF frame
     SendByte_MCP2515(RXF1SIDH,0xFD);//Fileter register
     SendByte_MCP2515(RXF1SIDL,0xC0);//Just receive ID=0x7EE frame
     SendByte_MCP2515(RXM0SIDH,0xFF);//Mask register
     SendByte_MCP2515(RXM0SIDL,0xE0);
    //Configurate TXB0's ID and DLC registers
    SendByte_MCP2515(TXB0SIDH,0xFF);//Standard ID
    SendByte_MCP2515(TXB0SIDL,0xE0);//Standard ID
    SendByte_MCP2515(TXB0DLC,DLC_1);//DLC
     /*Set the RXB0 or RXB1 interrupt enableling*/
//    SendByte_MCP2515(CANINTE,RX0IE);//Enable RXB0 interrupt

     SendByte_MCP2515(CANCTRL,REQOP_NORMAL | CLKOUT_ENABLED);//Go into the normal mode
      dummy=ReadByte_MCP2515(CANSTAT);
        if (OPMODE_NORMAL != (dummy & 0xE0))
          SendByte_MCP2515(CANCTRL,REQOP_NORMAL | CLKOUT_ENABLED);//If normal ok       
}

/**
  * @brief  Reset the MCP2515 then U go into the configruation mode
  * @param  none
  * @retval none
  */
void MCP2515_Reset(void)
{
    CS_LOW();               
    SPI_Send(SPI_RESET);   
    CS_HIGH();               
}

/**
  * @brief  Modify the bit of the register
  * @param  Add:Address of register
  * @param  Mask:1-->U can modify the corresponding bit;0-->U can not modify the corresponding bit
  * @param  Data:the data U need to be sent from MCU to MCP2515
  * @retval none
  */
void MCP2515_BitModify(unsigned char Addr,unsigned char Mask,unsigned char Data)
{
    CS_LOW();               
    SPI_Send(SPI_BIT_MODIFY);
    SPI_Send(Addr);
    SPI_Send(Mask);
    SPI_Send(Data);
    CS_HIGH();   
}

/**
  * @brief  Send a byte to MCP2515 through SPI to return corresponding status you need
  * @param  Add:Address of register
  * @param  Data:the data U need to be sent from MCU to MCP2515
  * @retval none
  */
void SendByte_MCP2515(unsigned char Addr,unsigned char Data)
{
    CS_LOW();       
    SPI_Send(SPI_WRITE);
    SPI_Send(Addr);
    SPI_Send(Data);
    CS_HIGH();       
}

/**
  * @brief  Send a command to MCP2515 through SPI to return corresponding status you need
  * @param  CMD:command
  * @retval Data:Data from MCP2515'SO pin
  */
unsigned char ReadByte_MCP2515(unsigned char Addr)
{
    unsigned char Data;                   
    CS_LOW();               
    SPI_Send(SPI_READ);
    SPI_Send(Addr);
    Data = SPI_Receive();   
    CS_HIGH();               
    return Data;
}

/**
  * @brief  Send a command to MCP2515 through SPI to return corresponding status you need
  * @param  CMD:       
                  SPI_RX_STATUS;
                SPI_READ_STATUS;
                SPI_READ_RX;
  * @retval Data:the status you need
  */
unsigned char SPI_CMD_MCP2515(unsigned char CMD)
{
    unsigned char Data;                   
    CS_LOW();               
    SPI_Send(CMD);
    Data = SPI_Receive();   
    CS_HIGH();               
    return Data;
}

/**
  * @brief  Read 8 bytes to CAN bus
  * @param  CAN_TX_Buf:the address of data'indicator,8bytes
  * @retval none
  */
void CAN_Send8bytes(unsigned char *CAN_TX_Buf)
{
    unsigned char tempdata;
    tempdata=ReadByte_MCP2515(SPI_READ_STATUS);
    SendByte_MCP2515(TXB0D0,CAN_TX_Buf[0]);
    SendByte_MCP2515(TXB0D1,CAN_TX_Buf[1]);
    SendByte_MCP2515(TXB0D2,CAN_TX_Buf[2]);
    SendByte_MCP2515(TXB0D3,CAN_TX_Buf[3]);
    SendByte_MCP2515(TXB0D4,CAN_TX_Buf[4]);
    SendByte_MCP2515(TXB0D5,CAN_TX_Buf[5]);
    SendByte_MCP2515(TXB0D6,CAN_TX_Buf[6]);
    SendByte_MCP2515(TXB0D7,CAN_TX_Buf[7]);
    if(tempdata&0x04)//check the TXREQ bit
    {
        _delay_(0x4000);
        MCP2515_BitModify(TXB0CTRL,0x80,0x00);//clear TXREQ bit
        while(SPI_CMD_MCP2515(SPI_READ_STATUS)&0x04);//wait until TXREQ bit matchs 0
    }
    CS_LOW();
    SPI_Send(SPI_RTS_TXB0);//TXB0 send-request
    CS_HIGH();
}

/**
  * @brief  Send a byte to CAN bus by TXB0
  * @param  Data:data to be sent
  * @retval none
  */
void CAN_SendOneByte(unsigned char Data)
{
    unsigned char tempdata;
/*Test the driver between MCP2515 and the SPI periphere :tempdata<--------------*/
    tempdata=SPI_CMD_MCP2515(SPI_READ_STATUS);
    if(tempdata&0x04)//check the TXREQ bit
    {
        _delay_(0x4000);
        MCP2515_BitModify(TXB0CTRL,0x08,0x00);//clear TXREQ bit
        while(SPI_CMD_MCP2515(SPI_READ_STATUS)&0x04);//wait until TXREQ bit matchs 0
    }
    SendByte_MCP2515(TXB0D0,Data);
    CS_LOW();
    SPI_Send(SPI_RTS_TXB0);//TXB0 send-request
    CS_HIGH();
}

/**
  * @brief  Receive a byte from MCP2515 RXB0
  * @param  none
  * @retval Data:return the effectively data from RXB0
  */
unsigned char CAN_Receive_onebyte()
{
    unsigned char tempdata;
    tempdata=SPI_CMD_MCP2515(SPI_READ_STATUS);//confirm receive data=RXB0IF
    if(tempdata&0x01)   
    {
        tempdata=SPI_CMD_MCP2515(SPI_RX_STATUS);
        if(tempdata&0x40)//true means RXB0's standard frame
        {           
            tempdata=ReadByte_MCP2515(RXB0D0);
        }
        else
            {tempdata=254;}//no standard frame receive
        MCP2515_BitModify(CANINTF,0x01,0x00);   
    }
    else
        {tempdata=255;}//no frame receive
    return tempdata;
}

/**
  * @brief   Send n bytes with a given standard ID  corresponding to frame type
  * @param   CAN_TX_Buf: data to be sent
  * @param     DLC:DLC<=8
  * @param   SID:<=0x7FF
  * @param   CAN_FrameType:CAN_STD,CAN_RTR       
  * @retval None
  */
void CAN_SendData(unsigned char *CAN_TX_Buf,Frame_TypeDef *Frame )
{
    unsigned char tempdata;
    unsigned char HSID,LSID;
    if(Frame->Type==CAN_STD)
    {
        /*Set the ID of the frame*/
        HSID=(unsigned char)(Frame->SID>>3);
        LSID=(unsigned char)((Frame->SID<<5)&0xE0);
        SendByte_MCP2515(TXB0SIDH,HSID);
        SendByte_MCP2515(TXB0SIDL,LSID);
        /*Set the DLC and the type of the frame*/
        SendByte_MCP2515(TXB0DLC,Frame->DLC|CAN_STD);
        /*Write the data into the TXB0 data registers */
        for(tempdata=0;tempdata<Frame->DLC;tempdata++)
        SendByte_MCP2515(TXB0D[tempdata],CAN_TX_Buf[tempdata]);       
/*        SendByte_MCP2515(TXB0D0,CAN_TX_Buf[0]);
        SendByte_MCP2515(TXB0D1,CAN_TX_Buf[1]);
        SendByte_MCP2515(TXB0D2,CAN_TX_Buf[2]);
        SendByte_MCP2515(TXB0D3,CAN_TX_Buf[3]);
        SendByte_MCP2515(TXB0D4,CAN_TX_Buf[4]);
        SendByte_MCP2515(TXB0D5,CAN_TX_Buf[5]);
        SendByte_MCP2515(TXB0D6,CAN_TX_Buf[6]);
        SendByte_MCP2515(TXB0D7,CAN_TX_Buf[7]);*/
    }
    else  /*if(CAN_FrameType==CAN_RTR)*/
    {
        /*Set the ID of the frame*/
        HSID=(unsigned char)(Frame->SID>>3);
        LSID=(unsigned char)((Frame->SID<<5)&0xE0);
        SendByte_MCP2515(TXB0SIDH,HSID);
        SendByte_MCP2515(TXB0SIDL,LSID);
        /*Set the type of the frame*/
        SendByte_MCP2515(TXB0DLC,CAN_RTR);
    }

    tempdata=SPI_CMD_MCP2515(SPI_READ_STATUS);
    if(tempdata&0x04)
    {
        _delay_(0x4000);
        MCP2515_BitModify(TXB0CTRL,0x80,0x00);
        while(SPI_CMD_MCP2515(SPI_READ_STATUS)&0x04);
    }
    /*Send the SPI_RTS_TXB0 request command to MCP2515 to send the data loaded in the data register*/
    CS_LOW();
    SPI_Send(SPI_RTS_TXB0);
    CS_HIGH();
}

/**
  * @brief  Receive n bytes from MCP2515 RXB0
  * @param  none
  * @retval Data:return the effectively data from RXB0
  */
unsigned char CAN_ReceiveData(unsigned char *CAN_RX_Buf,Frame_TypeDef *Frame)
{
    unsigned char tempdata;
    unsigned int CAN_ID;
//    tempdata=SPI_CMD_MCP2515(SPI_READ_STATUS);//check if it is received a  frame
    tempdata=SPI_CMD_MCP2515(SPI_RX_STATUS);

    if(tempdata&0x40)//RXB0
    {
        CAN_ID=(unsigned int)((ReadByte_MCP2515(RXB0SIDH))<<8);
        CAN_ID|=(unsigned int)(ReadByte_MCP2515(RXB0SIDL));
        CAN_ID>>=5;
        /*Check the CAN_ID you received that if it is matched with the SID you wish*/
        if(CAN_ID==Frame->SID)
        {
//            _delay_(0x4000);
            for(tempdata=0;tempdata<Frame->DLC;tempdata++)
            CAN_RX_Buf[tempdata]=ReadByte_MCP2515(RXB0D[tempdata]);
/*            CAN_RX_Buf[0]=ReadByte_MCP2515(RXB0D0);
            CAN_RX_Buf[1]=ReadByte_MCP2515(RXB0D1);
            CAN_RX_Buf[2]=ReadByte_MCP2515(RXB0D2);
            CAN_RX_Buf[3]=ReadByte_MCP2515(RXB0D3);
            CAN_RX_Buf[4]=ReadByte_MCP2515(RXB0D4);
            CAN_RX_Buf[5]=ReadByte_MCP2515(RXB0D5);
            CAN_RX_Buf[6]=ReadByte_MCP2515(RXB0D6);
            CAN_RX_Buf[7]=ReadByte_MCP2515(RXB0D7);*/
        MCP2515_BitModify(CANINTF,0x01,0x00);
        }
        else
        {
            return 0;//ID is not correct
        }
        return 1;//receive ok
    }
    else
    return 2;//no standard frame receive
}

 

 

MCP2515无BUG版本驱动(H文件)

/* Define to prevent recursive inclusion -------------------------------------*/
#ifndef __MCP2515_H
#define __MCP2515_H

/* Includes ------------------------------------------------------------------*/
#include "stm8s_eval_mcp2515.h"

/* Configuration Registers */
#define CANSTAT         0x0E
#define CANCTRL         0x0F
#define BFPCTRL         0x0C
#define TEC             0x1C
#define REC             0x1D
#define CNF3            0x28
#define CNF2            0x29
#define CNF1            0x2A
#define CANINTE         0x2B
#define CANINTF         0x2C
#define EFLG            0x2D
#define TXRTSCTRL       0x0D

/*  Recieve Filters */
#define RXF0SIDH        0x00
#define RXF0SIDL        0x01
#define RXF0EID8        0x02
#define RXF0EID0        0x03
#define RXF1SIDH        0x04
#define RXF1SIDL        0x05
#define RXF1EID8        0x06
#define RXF1EID0        0x07
#define RXF2SIDH        0x08
#define RXF2SIDL        0x09
#define RXF2EID8        0x0A
#define RXF2EID0        0x0B
#define RXF3SIDH        0x10
#define RXF3SIDL        0x11
#define RXF3EID8        0x12
#define RXF3EID0        0x13
#define RXF4SIDH        0x14
#define RXF4SIDL        0x15
#define RXF4EID8        0x16
#define RXF4EID0        0x17
#define RXF5SIDH        0x18
#define RXF5SIDL        0x19
#define RXF5EID8        0x1A
#define RXF5EID0        0x1B

/* Receive Masks */
#define RXM0SIDH        0x20
#define RXM0SIDL        0x21
#define RXM0EID8        0x22
#define RXM0EID0        0x23
#define RXM1SIDH        0x24
#define RXM1SIDL        0x25
#define RXM1EID8        0x26
#define RXM1EID0        0x27

/* Tx Buffer 0 */
#define TXB0CTRL        0x30
#define TXB0SIDH        0x31
#define TXB0SIDL        0x32
#define TXB0EID8        0x33
#define TXB0EID0        0x34
#define TXB0DLC         0x35
#define TXB0D0          0x36
#define TXB0D1          0x37
#define TXB0D2          0x38
#define TXB0D3          0x39
#define TXB0D4          0x3A
#define TXB0D5          0x3B
#define TXB0D6          0x3C
#define TXB0D7          0x3D
/* Tx Buffer 1 */
#define TXB1CTRL        0x40
#define TXB1SIDH        0x41
#define TXB1SIDL        0x42
#define TXB1EID8        0x43
#define TXB1EID0        0x44
#define TXB1DLC         0x45
#define TXB1D0          0x46
#define TXB1D1          0x47
#define TXB1D2          0x48
#define TXB1D3          0x49
#define TXB1D4          0x4A
#define TXB1D5          0x4B
#define TXB1D6          0x4C
#define TXB1D7          0x4D

/* Tx Buffer 2 */
#define TXB2CTRL        0x50
#define TXB2SIDH        0x51
#define TXB2SIDL        0x52
#define TXB2EID8        0x53
#define TXB2EID0        0x54
#define TXB2DLC         0x55
#define TXB2D0          0x56
#define TXB2D1          0x57
#define TXB2D2          0x58
#define TXB2D3          0x59
#define TXB2D4          0x5A
#define TXB2D5          0x5B
#define TXB2D6          0x5C
#define TXB2D7          0x5D
/* Rx Buffer 0 */
#define RXB0CTRL        0x60
#define RXB0SIDH        0x61
#define RXB0SIDL        0x62
#define RXB0EID8        0x63
#define RXB0EID0        0x64
#define RXB0DLC         0x65
#define RXB0D0          0x66
#define RXB0D1          0x67
#define RXB0D2          0x68
#define RXB0D3          0x69
#define RXB0D4          0x6A
#define RXB0D5          0x6B
#define RXB0D6          0x6C
#define RXB0D7          0x6D
/* Rx Buffer 1 */
#define RXB1CTRL        0x70
#define RXB1SIDH        0x71
#define RXB1SIDL        0x72
#define RXB1EID8        0x73
#define RXB1EID0        0x74
#define RXB1DLC         0x75
#define RXB1D0          0x76
#define RXB1D1          0x77
#define RXB1D2          0x78
#define RXB1D3          0x79
#define RXB1D4          0x7A
#define RXB1D5          0x7B
#define RXB1D6          0x7C
#define RXB1D7          0x7D

/*******************************************************************
*               Bit register masks                                *
*******************************************************************/

/* TXBnCTRL */
#define TXREQ           0x08
#define TXP             0x03   

/* RXBnCTRL */
#define RXM             0x60
#define BUKT            0x04

/* CANCTRL */
#define REQOP           0xE0
#define ABAT            0x10
#define    OSM                 0x08
#define CLKEN           0x04
#define CLKPRE          0x03

/* CANSTAT */
#define REQOP           0xE0
#define ICOD            0x0E

/* CANINTE */  
#define RX0IE           0x01
#define RX1IE           0x02
#define TX0IE           0x04
#define TX1IE           0x80
#define TX2IE           0x10
#define ERRIE           0x20
#define WAKIE           0x40
#define MERRE           0x80

/* CANINTF */  
#define RX0IF           0x01
#define RX1IF           0x02
#define TX0IF           0x04
#define TX1IF           0x80
#define TX2IF           0x10
#define ERRIF           0x20
#define WAKIF           0x40
#define MERRF           0x80

/* BFPCTRL */
#define B1BFS           0x20
#define B0BFS           0x10
#define B1BFE           0x08
#define B0BFE           0x04
#define B1BFM           0x02
#define B0BFM           0x01

/* CNF1 Masks */
#define SJW             0xC0
#define BRP             0x3F

/* CNF2 Masks */
#define BTLMODE         0x80
#define SAM             0x40
#define PHSEG1          0x38
#define PRSEG           0x07

/* CNF3 Masks */
#define WAKFIL          0x40
#define PHSEG2          0x07

/* TXRTSCTRL Masks */
#define TXB2RTS         0x04
#define TXB1RTS         0x02
#define TXB0RTS         0x01

/*******************************************************************
*                    Bit Timing Configuration                     *
*******************************************************************/
/* CNF1 */
#define SJW_1TQ         0x40
#define SJW_2TQ         0x80
#define SJW_3TQ         0x90
#define SJW_4TQ         0xC0

/* CNF2 */
#define BTLMODE_CNF3    0x80
#define BTLMODE_PH1_IPT 0x00

#define SMPL_3X         0x40
#define SMPL_1X         0x00

#define PHSEG1_8TQ      0x38
#define PHSEG1_7TQ      0x30
#define PHSEG1_6TQ      0x28
#define PHSEG1_5TQ      0x20
#define PHSEG1_4TQ      0x18
#define PHSEG1_3TQ      0x10
#define PHSEG1_2TQ      0x08
#define PHSEG1_1TQ      0x00

#define PRSEG_8TQ       0x07
#define PRSEG_7TQ       0x06
#define PRSEG_6TQ       0x05
#define PRSEG_5TQ       0x04
#define PRSEG_4TQ       0x03
#define PRSEG_3TQ       0x02
#define PRSEG_2TQ       0x01
#define PRSEG_1TQ       0x00

/* CNF3 */
#define PHSEG2_8TQ      0x07
#define PHSEG2_7TQ      0x06
#define PHSEG2_6TQ      0x05
#define PHSEG2_5TQ      0x04
#define PHSEG2_4TQ      0x03
#define PHSEG2_3TQ      0x02
#define PHSEG2_2TQ      0x01
#define PHSEG2_1TQ      0x00

#define SOF_ENABLED     0x80
#define WAKFIL_ENABLED  0x40
#define WAKFIL_DISABLED 0x00   

/*******************************************************************
*                  Control/Configuration Registers                *
*******************************************************************/

/* CANINTE */
#define RX0IE_ENABLED   0x01
#define RX0IE_DISABLED  0x00
#define RX1IE_ENABLED   0x02
#define RX1IE_DISABLED  0x00
#define G_RXIE_ENABLED  0x03
#define G_RXIE_DISABLED 0x00

#define TX0IE_ENABLED   0x04
#define TX0IE_DISABLED  0x00
#define TX1IE_ENABLED   0x08
#define TX2IE_DISABLED  0x00
#define TX2IE_ENABLED   0x10
#define TX2IE_DISABLED  0x00
#define G_TXIE_ENABLED  0x1C
#define G_TXIE_DISABLED 0x00

#define ERRIE_ENABLED   0x20
#define ERRIE_DISABLED  0x00
#define WAKIE_ENABLED   0x40
#define WAKIE_DISABLED  0x00
#define IVRE_ENABLED    0x80
#define IVRE_DISABLED   0x00

/* CANINTF */
#define RX0IF_SET       0x01
#define RX0IF_RESET     0x00
#define RX1IF_SET       0x02
#define RX1IF_RESET     0x00
#define TX0IF_SET       0x04
#define TX0IF_RESET     0x00
#define TX1IF_SET       0x08
#define TX2IF_RESET     0x00
#define TX2IF_SET       0x10
#define TX2IF_RESET     0x00
#define ERRIF_SET       0x20
#define ERRIF_RESET     0x00
#define WAKIF_SET       0x40
#define WAKIF_RESET     0x00
#define IVRF_SET        0x80
#define IVRF_RESET      0x00

/* CANCTRL */
#define REQOP_CONFIG    0x80
#define REQOP_LISTEN    0x60
#define REQOP_LOOPBACK  0x40
#define REQOP_SLEEP     0x20
#define REQOP_NORMAL    0x00

#define ABORT           0x10

#define OSM_ENABLED     0x08

#define CLKOUT_ENABLED  0x04
#define CLKOUT_DISABLED 0x00
#define CLKOUT_PRE_8    0x03
#define CLKOUT_PRE_4    0x02
#define CLKOUT_PRE_2    0x01
#define CLKOUT_PRE_1    0x00

/* CANSTAT */
#define OPMODE_CONFIG   0x80
#define OPMODE_LISTEN   0x60
#define OPMODE_LOOPBACK 0x40
#define OPMODE_SLEEP    0x20
#define OPMODE_NORMAL   0x00

/* RXBnCTRL */
#define RXM_RCV_ALL     0x60
#define RXM_VALID_EXT   0x40
#define RXM_VALID_STD   0x20
#define RXM_VALID_ALL   0x00

#define RXRTR_REMOTE    0x08
#define RXRTR_NO_REMOTE 0x00

#define BUKT_ROLLOVER    0x04
#define BUKT_NO_ROLLOVER 0x00

#define FILHIT0_FLTR_1  0x01
#define FILHIT0_FLTR_0  0x00

#define FILHIT1_FLTR_5  0x05
#define FILHIT1_FLTR_4  0x04
#define FILHIT1_FLTR_3  0x03
#define FILHIT1_FLTR_2  0x02
#define FILHIT1_FLTR_1  0x01
#define FILHIT1_FLTR_0  0x00

/* TXBnCTRL */
#define TXREQ_SET       0x08
#define TXREQ_CLEAR     0x00

#define TXP_HIGHEST     0x03
#define TXP_INTER_HIGH  0x02
#define TXP_INTER_LOW   0x01
#define TXP_LOWEST      0x00

/*******************************************************************
*                  Register Bit Masks                             *
*******************************************************************/
#define DLC_0          0x00
#define DLC_1          0x01
#define DLC_2          0x02
#define DLC_3          0x03
#define DLC_4          0x04
#define DLC_5          0x05
#define DLC_6          0x06
#define DLC_7          0x07   
#define DLC_8          0x08

/*******************************************************************
*                  CAN SPI commands                               *
*******************************************************************/

#define SPI_RESET       0xC0
#define SPI_READ        0x03
#define SPI_WRITE       0x02
#define SPI_RTS         0x80
#define SPI_RTS_TXB0    0x81
#define SPI_RTS_TXB1    0x82
#define SPI_RTS_TXB2    0x84
#define SPI_READ_STATUS 0xA0
#define SPI_BIT_MODIFY  0x05 
#define SPI_RX_STATUS   0xB0
#define SPI_READ_RX          0x90
#define SPI_WRITE_TX    0X40 

/*******************************************************************
*                  Miscellaneous                                  *
*******************************************************************/

#define DUMMY_BYTE      0x00
#define TXB0            0x31
#define TXB1            0x41
#define TXB2            0x51
#define RXB0            0x61
#define RXB1            0x71
#define EXIDE_SET       0x08
#define EXIDE_RESET     0x00

/**************************************************************
*                  CAN Speed                                 *
*************************************************************/
#define CAN_10Kbps          0x31
#define CAN_25Kbps          0x13
#define CAN_50Kbps             0x09
#define CAN_100Kbps         0x04
#define CAN_125Kbps            0x03
#define CAN_250Kbps         0x01
#define CAN_500Kbps         0x00

/*Frame Definition*/
typedef enum
{
    CAN_STD=(unsigned char)(0x00),
    CAN_RTR=(unsigned char)(0x40)
}CAN_FrameType_TypeDef;

typedef struct Frame_Strut
{
    unsigned int SID;
    unsigned char DLC;
    CAN_FrameType_TypeDef Type;
}Frame_TypeDef;

/* Exported variables --------------------------------------------------------*/
extern unsigned char RXB0D[8];
extern unsigned char TXB0D[8];
/* Exported functions --------------------------------------------------------*/
void MCP2515_Init(void);
void MCP2515_Reset(void);
void MCP2515_BitModify(unsigned char Addr,unsigned char Mask,unsigned char Data);
void SendByte_MCP2515(unsigned char Addr,unsigned char Data);
unsigned char ReadByte_MCP2515(unsigned char Addr);
unsigned char SPI_CMD_MCP2515(unsigned char CMD);
void CAN_Send8bytes(unsigned char *CAN_TX_Buf);
void CAN_SendOneByte(unsigned char Data);
unsigned char CAN_Receive_onebyte(void);
void CAN_SendData(unsigned char *CAN_TX_Buf,Frame_TypeDef *Frame);
unsigned char CAN_ReceiveData(unsigned char *CAN_RX_Buf,Frame_TypeDef *Frame);

#endif

 

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