四位密码锁*电子密码锁的设计

 

  • 代码和工程包:https://download.csdn.net/download/qinglingls/10839179 实验报告中解释了如何使用和使用后的示意图

  • 由于最近问我的人有点多,细节我也记不太清了。大家自行下载下面的pdf和工程文件, 希望对你们有帮助,谢谢。 实验报告:https://download.csdn.net/download/qinglingls/10839175
  • -----------------------------------------------------------2019.5.27更新---------------------------------------------------------------
  • 上面两个网址是仿真文件和工程(好像烧在板子上有问题)
  • 所以我传了下面这个文件
  • 下面是pdf和工程文件打包,也就是博客公布代码的内容和上面的实验报告pdf的打包。
  • https://download.csdn.net/download/qinglingls/11209189
  •  

 

 

注意:轉載必須附上原網址,附上作者名,謝謝。

 

四位密码锁大实验:

 

功能:

题目:电子密码锁的设计  

 [设计要求]

(1)设计一个开锁密码至少为4位数字(或更多)的密码锁。

(2)当开锁按扭开关(可设置8位或更多,其中只有4位有效,其余位为虚设)的输入代码等于所设密码时启动开锁控制电路,并且用绿灯亮、红灯灭表示开锁状态。

(3)从第一个按扭触动后的5秒内若未能将锁打开,则电路自动复位并发出报警信号,同时用绿灯灭、红灯亮表示关锁状态。 

附加功能

(1)可以设置密码,通过设置密码按钮SP(S4)设置,且可以重新设置新密码。任何情况下按SP后输入都可以设置密码。

(2)五秒计时采用倒计时显示在开发板的七段数码管上。五秒后发出警报(绿灯亮)。

(3)能记录按键输入密码的次数(0-9)。

(4)能清零输入次数而不改变密码。

 

其中num0_1到num0_7用来控制七段电子数码管。

num1_1到num1_7用来控制计时器timer的电子数码管显示。

 

代码:

 

 

 

module index(input clk,
	input pw_1, input pw_2, input pw_3, input pw_4, 
	input pw_5, input pw_6, input pw_7, input pw_8,
	input sti_0, input sti_1, input sti_2,
	output x, output y,
	output reg red, output reg green, output reg alarm,
    output reg num0_1, output reg num0_2, output reg num0_3, output reg num0_4,
    output reg num0_5, output reg num0_6, output reg num0_7, output reg num0_8, 
    output reg num1_1, output reg num1_2, output reg num1_3, output reg num1_4,
    output reg num1_5, output reg num1_6, output reg num1_7, output reg num1_8
	);
	/*
	 * clk : clock
	 * pw  : password
	 * sti : stimulation
	 * red/green : output LED
	 * num: nixie
	 *
	 */
    reg ctrl;
    reg cc;
	assign x = 1;
	assign y = 1;
    initial begin
        cc <= 1'b0;
        alarm <= 1'b0;
        ctrl <= 1'b0;
        red <= 1'b1;
        green <= 1'b0;
        num0_1 <= 1'b1;
        num0_2 <= 1'b1;
        num0_3 <= 1'b1;
        num0_4 <= 1'b1;
        num0_5 <= 1'b1;
        num0_6 <= 1'b1;
        num0_8 <= 1'b1;
        num1_1 <= 1'b1;
        num1_2 <= 1'b0;
        num1_3 <= 1'b1;
        num1_4 <= 1'b1;
        num1_5 <= 1'b0;
        num1_6 <= 1'b1;
        num1_7 <= 1'b1;
    end
    // CLK 分频
	reg CLK;
	parameter N = 20000000;
	reg [31:0]ip;
	reg [31:0]ipr;

	always @(posedge clk) begin
        if(ip < N/2) begin
            ip <= ip + 1;
        end
        else begin
            CLK <= ~CLK;
            ip <= 36'b0;
        end
    end
    
    // 设置密码
	reg str_0, str_1, str_2, str_3;
    reg in_0, in_1, in_2, in_3;
    reg in__; reg vtrl;
    integer count = 0;

    // 计时器
    integer timer = 5;
    always @(posedge CLK) begin
        if(sti_2 == 1'b1) begin
            ctrl <= 1'b1;
        end
        in__ <= sti_1;
        case(count)
            0: begin
                num0_1 <= 1'b1;
                num0_2 <= 1'b1;
                num0_3 <= 1'b1;
                num0_4 <= 1'b1;
                num0_5 <= 1'b1;
                num0_6 <= 1'b1;
                num0_7 <= 1'b0;
            end
            1: begin
                num0_1 <= 1'b0;
                num0_2 <= 1'b1;
                num0_3 <= 1'b1;
                num0_4 <= 1'b0;;
                num0_5 <= 1'b0;
                num0_6 <= 1'b0;
                num0_7 <= 1'b0;
            end
            2: begin
                num0_1 <= 1'b1;
                num0_2 <= 1'b1;
                num0_3 <= 1'b0;
                num0_4 <= 1'b1;
                num0_5 <= 1'b1;
                num0_6 <= 1'b0;
                num0_7 <= 1'b1;
            end
            3: begin
                num0_1 <= 1'b1;
                num0_2 <= 1'b1;
                num0_3 <= 1'b1;
                num0_4 <= 1'b1;
                num0_5 <= 1'b0;
                num0_6 <= 1'b0;
                num0_7 <= 1'b1;
            end
            4: begin
                num0_1 <= 1'b0;
                num0_2 <= 1'b1;
                num0_3 <= 1'b1;
                num0_4 <= 1'b0;
                num0_5 <= 1'b0;
                num0_6 <= 1'b1;
                num0_7 <= 1'b1;
            end
            5: begin
                num0_1 <= 1'b1;
                num0_2 <= 1'b0;
                num0_3 <= 1'b1;
                num0_4 <= 1'b1;
                num0_5 <= 1'b0;
                num0_6 <= 1'b1;
                num0_7 <= 1'b1;
            end
            6: begin
                num0_1 <= 1'b1;
                num0_2 <= 1'b0;
                num0_3 <= 1'b1;
                num0_4 <= 1'b1;
                num0_5 <= 1'b1;
                num0_6 <= 1'b1;
                num0_7 <= 1'b1;
            end
            7: begin
                num0_1 <= 1'b1;
                num0_2 <= 1'b1;
                num0_3 <= 1'b1;
                num0_4 <= 1'b0;
                num0_5 <= 1'b0;
                num0_6 <= 1'b0;
                num0_7 <= 1'b0;
            end
            8: begin
                num0_1 <= 1'b1;
                num0_2 <= 1'b1;
                num0_3 <= 1'b1;
                num0_4 <= 1'b1;
                num0_5 <= 1'b1;
                num0_6 <= 1'b1;
                num0_7 <= 1'b1;
            end
            9: begin
                num0_1 <= 1'b1;
                num0_2 <= 1'b1;
                num0_3 <= 1'b1;
                num0_4 <= 1'b1;
                num0_5 <= 1'b0;
                num0_6 <= 1'b1;
                num0_7 <= 1'b1;
            end
            endcase
        if(sti_2 == 1'b1) begin
                in_0 <= pw_5;
                in_1 <= pw_6;
                in_2 <= pw_7;
                in_3 <= pw_8;
                if(pw_1 == 1'b1 && in_0 == str_0 && in_1 == str_1 && in_2 == str_2 && in_3 == str_3) begin
                if(cc == 1'b0) begin
                    count <= count;
                    cc <= 1'b1;
                end    
                else begin
                    count <= count + 1;
                end
                    green <= 1'b1;
                    red <= 1'b0;
                    alarm <= 1'b0;
                end else if(pw_1 == 1'b1 && (in_0 != str_0 || in_1 != str_1 || in_2 != str_2 || in_3 != str_3)) begin
                    if(cc == 1'b0) begin
                        count <= count;
                        cc <= 1'b1;
                    end else begin
                        count <= count +1 ;
                    end
                end else if(pw_1 == 1'b0) begin
                    if(in_0 == str_0 && in_1 == str_1 && in_2 == str_2 && in_3 == str_3) begin
                    if(cc == 1'b0) begin
                        count <= count;
                        cc <= 1'b1;
                    end else begin 
                        count <= count +1;
                    end
                        green <= 1'b1;
                        red <= 1'b0;
                        alarm <= 1'b0;
                    end
                    count <= count;
                end
                if(count == 9) begin
                    alarm <= 1'b1;
                    red <= 1'b1;
                    green <= 1'b0;
                end
        end
        if(pw_1 == 1'b1) begin
            case(timer)
            0: begin
               num1_1 <= 1'b1;
               num1_2 <= 1'b1;
               num1_3 <= 1'b1;
               num1_4 <= 1'b1;
               num1_5 <= 1'b1;
               num1_6 <= 1'b1;
               num1_7 <= 1'b0;
            end
            1: begin
               num1_1 <= 1'b0;
               num1_2 <= 1'b1;
               num1_3 <= 1'b1;
               num1_4 <= 1'b0;
               num1_5 <= 1'b0;
               num1_6 <= 1'b0;
               num1_7 <= 1'b0;
            end
            2: begin
               num1_1 <= 1'b1;
               num1_2 <= 1'b1;
               num1_3 <= 1'b0;
               num1_4 <= 1'b1;
               num1_5 <= 1'b1;
               num1_6 <= 1'b0;
               num1_7 <= 1'b1;
            end
            3: begin
               num1_1 <= 1'b1;
               num1_2 <= 1'b1;
               num1_3 <= 1'b1;
               num1_4 <= 1'b1;
               num1_5 <= 1'b0;
               num1_6 <= 1'b0;
               num1_7 <= 1'b1;
            end
            4: begin
               num1_1 <= 1'b0;
               num1_2 <= 1'b1;
               num1_3 <= 1'b1;
               num1_4 <= 1'b0;
               num1_5 <= 1'b0;
               num1_6 <= 1'b1;
               num1_7 <= 1'b1;
            end
            5: begin
               num1_1 <= 1'b1;
               num1_2 <= 1'b0;
               num1_3 <= 1'b1;
               num1_4 <= 1'b1;
               num1_5 <= 1'b0;
               num1_6 <= 1'b1;
               num1_7 <= 1'b1;
            end
            endcase
            if(in_0 == str_0 && in_1 == str_1 && in_2 == str_2 && in_3 == str_3) begin
                timer <= timer;
                red <= 1'b0;
                green <= 1'b1;
            end else if(ipr < 5) begin
                timer <= timer;
                red <= 1'b1;
                green <= 1'b0;
                ipr <= ipr + 1;
            end else if(ipr == 5 && ctrl == 1'b1) begin
                timer <= timer - 1;
                red <= 1'b1;
                green <= 1'b0;
                ipr <= 0;
            end
            if(timer == 0) begin
                red <= 1'b1;
                green <= 1'b0;
                alarm <= 1'b1;
            end
        end
        else begin
            timer <= 5;
        end
        if(in__ == 1'b1) begin
                timer <= 5;
                in_0 <= 0;
                in_1 <= 0;
                in_2 <= 0;
                in_3 <= 0;
                count <= 4'b0000;
                ctrl = 1'b0;
                green <= 1'b0;
                cc <= 1'b0;
                alarm <= 1'b0;
                red <= 1'b1;
                num0_1 <= 1'b1;
                num0_2 <= 1'b1;
                num0_3 <= 1'b1;
                num0_4 <= 1'b1;
                num0_5 <= 1'b1;
                num0_6 <= 1'b1;
                num0_7 <= 1'b0;
                num1_1 <= 1'b1;
                num1_2 <= 1'b0;
                num1_3 <= 1'b1;
                num1_4 <= 1'b1;
                num1_5 <= 1'b0;
                num1_6 <= 1'b1;
                num1_7 <= 1'b1;
        end
        if(sti_0 == 1'b1) begin
            str_0 <= pw_5;
                str_1 <= pw_6;
                str_2 <= pw_7;
                str_3 <= pw_8;
        end
    end
endmodule

 

 

 

管脚绑定:

 

set_property IOSTANDARD LVCMOS33 [get_ports alarm]
set_property IOSTANDARD LVCMOS33 [get_ports clk]
set_property IOSTANDARD LVCMOS33 [get_ports green]
set_property IOSTANDARD LVCMOS33 [get_ports num0_1]
set_property IOSTANDARD LVCMOS33 [get_ports num0_2]
set_property IOSTANDARD LVCMOS33 [get_ports num0_3]
set_property IOSTANDARD LVCMOS33 [get_ports num0_4]
set_property IOSTANDARD LVCMOS33 [get_ports num0_5]
set_property IOSTANDARD LVCMOS33 [get_ports num0_6]
set_property IOSTANDARD LVCMOS33 [get_ports num0_7]
set_property IOSTANDARD LVCMOS33 [get_ports num0_8]
set_property IOSTANDARD LVCMOS33 [get_ports num1_1]
set_property IOSTANDARD LVCMOS33 [get_ports num1_3]
set_property IOSTANDARD LVCMOS33 [get_ports num1_2]
set_property IOSTANDARD LVCMOS33 [get_ports num1_4]
set_property IOSTANDARD LVCMOS33 [get_ports num1_5]
set_property IOSTANDARD LVCMOS33 [get_ports pw_1]
set_property IOSTANDARD LVCMOS33 [get_ports num1_7]
set_property IOSTANDARD LVCMOS33 [get_ports num1_6]
set_property IOSTANDARD LVCMOS33 [get_ports num1_8]
set_property IOSTANDARD LVCMOS33 [get_ports pw_2]
set_property IOSTANDARD LVCMOS33 [get_ports pw_3]
set_property IOSTANDARD LVCMOS33 [get_ports pw_4]
set_property IOSTANDARD LVCMOS33 [get_ports sti_2]
set_property IOSTANDARD LVCMOS33 [get_ports sti_1]
set_property IOSTANDARD LVCMOS33 [get_ports red]
set_property IOSTANDARD LVCMOS33 [get_ports pw_8]
set_property IOSTANDARD LVCMOS33 [get_ports sti_0]
set_property IOSTANDARD LVCMOS33 [get_ports pw_6]
set_property IOSTANDARD LVCMOS33 [get_ports pw_7]
set_property IOSTANDARD LVCMOS33 [get_ports pw_5]
set_property PACKAGE_PIN K1 [get_ports alarm]
set_property PACKAGE_PIN H6 [get_ports green]
set_property PACKAGE_PIN H5 [get_ports red]
set_property PACKAGE_PIN B4 [get_ports num0_1]
set_property PACKAGE_PIN A4 [get_ports num0_2]
set_property PACKAGE_PIN A3 [get_ports num0_3]
set_property PACKAGE_PIN B1 [get_ports num0_4]
set_property PACKAGE_PIN A1 [get_ports num0_5]
set_property PACKAGE_PIN B3 [get_ports num0_6]
set_property PACKAGE_PIN B2 [get_ports num0_7]
set_property PACKAGE_PIN D5 [get_ports num0_8]
set_property PACKAGE_PIN D4 [get_ports num1_1]
set_property PACKAGE_PIN E3 [get_ports num1_2]
set_property PACKAGE_PIN D3 [get_ports num1_3]
set_property PACKAGE_PIN F4 [get_ports num1_4]
set_property PACKAGE_PIN F3 [get_ports num1_5]
set_property PACKAGE_PIN E2 [get_ports num1_6]
set_property PACKAGE_PIN D2 [get_ports num1_7]
set_property PACKAGE_PIN H2 [get_ports num1_8]
set_property PACKAGE_PIN P5 [get_ports pw_1]
set_property PACKAGE_PIN P4 [get_ports pw_2]
set_property PACKAGE_PIN P3 [get_ports pw_3]
set_property PACKAGE_PIN P2 [get_ports pw_4]
set_property PACKAGE_PIN R2 [get_ports pw_5]
set_property PACKAGE_PIN M4 [get_ports pw_6]
set_property PACKAGE_PIN N4 [get_ports pw_7]
set_property PACKAGE_PIN R1 [get_ports pw_8]
set_property PACKAGE_PIN U4 [get_ports sti_0]
set_property PACKAGE_PIN R17 [get_ports sti_1]
set_property PACKAGE_PIN R15 [get_ports sti_2]

set_property PACKAGE_PIN P17 [get_ports clk]

set_property IOSTANDARD LVCMOS33 [get_ports x]
set_property IOSTANDARD LVCMOS33 [get_ports y]
set_property PACKAGE_PIN G2 [get_ports x]
set_property PACKAGE_PIN G6 [get_ports y]

 

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