嵌入式系统面试1：interrupt

Hardware/Software interrupt            edge triggering/ level triggering

Hardware： triggered by peripheral devices outside the microcontroller，asynchronous and can occur in the middle of instruction execution， 我们谈论的基本都是硬件中断

Software： executing a special instruction in the instruction set which causes an interrupt when it is executed， 即这个是CPU主动执行的，比如进入trap，divided by zero

hardware interrupt include： rising/ falling edge triggering or certain level triggering

ISR/ interrupt vector table

nested interrupt    interrupt priority

                

https://www.tutorialspoint.com/embedded_systems/es_interrupts.htm  

注意上图最后一段，单片机的所有函数都共用一个stack，这个stack的初始化在startup.c 文件里面

enable interrupt

there is a register let u enable/disable interrupt( global)， also there is mask register to diable certain ISR

interrupt latency

Interrupt latency refers primarily to the software interrupt handling latencies

1. OS 进入critical的时候会disable ISR
2. context switch
3. RTOS这个没看懂，

https://www.bogotobogo.com/Embedded/hardware_interrupt_software_interrupt_latency_irq_vs_fiq.php

Reentrancy function

printf is not Reentrancy function(引用全局变量stdout), so should not be used in ISR

面试题----中断的一些知识 - 青儿哥哥 - 博客园

常见面试题：

1. interrupt函数不能有输入，没有返回值，函数内不能调用可重入函数，不要进行浮点运算等复杂程序
2. what is interrupt lantency?
3. how do you measure interrupt lantency?
4. how to reduce interrupt lantency?
5. what are the cause of interrupt lantency?

offer more：

1. ISR当然可以被disab，比如写OS的时候，在critical section就需要disable ISR
2. context switch
3. 中断的优先级可以改变吗，【写个实际的例子，ISR里面要ACK 吗，在开头还是结尾】
4. 和interrupt vector table 有什么关系，在startup.c 里面去设置interrupt vector table
5. 电机控制， ADC interrupt
6. RTOS task和ISR的关系  https://medium.com/@aareshbachana/embedded-systems-interrupts-ab193ecb09e1
7. 汇总的点  https://new.qq.com/omn/20190128/20190128A14KF6.html
8. double是 浮点数吗  请教一个关于中断的问题-CSDN论坛
9. DSP入门应该懂得57个问题_Charles' home-CSDN博客