异步FIFO debug日常

2020.12.19

• 不能利用寄存器直接进行数据位置选取
  Wrong: FIFO_data[FIFO_d:0];

//Wrong:
	input	[7:0]			w_data;
	reg		[255:0][7:0]	FIFO_data;
	reg		[3:0]			FIFO_d;
	reg		[16:0]			w_point;
	
	always @(posedge	clk) begin
		FIFO_data[FIFO_d:0] <=	w_data;
	end

//Right
	input	[7:0]			w_data;
	reg		[255:0][7:0]	FIFO_data;
	reg		[3:0]			FIFO_d;
	reg		[16:0]			w_point;
	
	wire    [16:0]  r_point_depth;
	assign  r_point_depth = ((17'd131071)<<(5'd16-FIFO_d))>>(5'd16-FIFO_d);
	
	always @(posedge	clk) begin
		FIFO_data[r_point_depth&w_point] <=	w_data;
	end
	

• 加减运算的优先级大于左右移

// 4^FIFO_d + 1
// Wrong
	3'd4<<FIFO_d + 1;
// Right
	(3'd4<<FIFO_d) + 1;