LS1028使用SPI1软件方案

前景介绍

LS1028原生有三路SPI，SPI2用在了核心板，底板用了两路，一路用作了SPI3，另外一路SPI1用作了TF卡的引脚，用于烧写系统。需要注意的是若将这一组引脚复用为SPI1的话，就没办法用TF卡进行烧写了。

修改RCW

RCW路径：
OK1028-linux-fs/packages/firmware/rcw/ls1028ardb/R_SQPP_0x85bb/rcw_1500_gpu600.rcw

SDHC1_BASE_PMUX=2

修改设备树

dtsi设备树路径：OK1028-linux-fs/packages/linux/linux/arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi
注册设备节点

+dspi1: spi@2100000 {
+                        compatible = "fsl,ls1028a-dspi", "fsl,ls1021a-v1.0-dspi";
+                        #address-cells = <1>;
+                        #size-cells = <0>;
+                        reg = <0x0 0x2120000 0x0 0x10000>;
+                        interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>;
+                        clock-names = "dspi";
+                        clocks = <&clockgen 4 0>;
+                        spi-num-chipselects = <4>;
+                        little-endian;
+                        status = "disabled";
+                };
dspi2: spi@2120000 {
                        compatible = "fsl,ls1028a-dspi", "fsl,ls1021a-v1.0-dspi";
                        #address-cells = <1>;
                        #size-cells = <0>;
                        reg = <0x0 0x2120000 0x0 0x10000>;
                        interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>;
                        clock-names = "dspi";
                        clocks = <&clockgen 4 0>;
                        spi-num-chipselects = <3>;
                        little-endian;
                        status = "disabled";
                };

内核设备树路径：OK1028-linux-fs/packages/linux/linux/arch/arm64/boot/dts/freescale/OK1028A-C.dts

&dspi1 {
        bus-num = <0>;
        status = "okay";
        spidev@0 {
                compatible = "spidev", "rohm,dh2228fv";
                reg = <0>;
                spi-max-frequency = <25000000>;
                fsl,spi-cs-sck-delay = <100>;
                fsl,spi-sck-cs-delay = <50>;
        };
};

其他

设备树节点注册参考文档：

OK1028-linux-fs/packages/linux/OK1028-linux-kernel/Documentation/devicetree/bindins/spi/spi-fsl-dspi.txt

Required properties:
- compatible : "fsl,vf610-dspi", "fsl,ls1021a-v1.0-dspi",
                "fsl,ls2085a-dspi"
                or
                "fsl,ls2080a-dspi" followed by "fsl,ls2085a-dspi"
                "fsl,ls1012a-dspi" followed by "fsl,ls1021a-v1.0-dspi"
                "fsl,ls1088a-dspi" followed by "fsl,ls1021a-v1.0-dspi"
- reg : Offset and length of the register set for the device
- interrupts : Should contain SPI controller interrupt
- clocks: from common clock binding: handle to dspi clock.
- clock-names: from common clock binding: Shall be "dspi".
- pinctrl-0: pin control group to be used for this controller.
- pinctrl-names: must contain a "default" entry.
- spi-num-chipselects : the number of the chipselect signals.
- bus-num : the slave chip chipselect signal number.

Optional property:
- big-endian: If present the dspi device's registers are implemented
  in big endian mode.

Optional SPI slave node properties:
- fsl,spi-cs-sck-delay: a delay in nanoseconds between activating chip
  select and the start of clock signal, at the start of a transfer.
- fsl,spi-sck-cs-delay: a delay in nanoseconds between stopping the clock
  signal and deactivating chip select, at the end of a transfer.

Example:

dspi0@4002c000 {
        #address-cells = <1>;
        #size-cells = <0>;
        compatible = "fsl,vf610-dspi";
        reg = <0x4002c000 0x1000>;
        interrupts = <0 67 0x04>;
        clocks = <&clks VF610_CLK_DSPI0>;
        clock-names = "dspi";
        spi-num-chipselects = <5>;
        bus-num = <0>;
        pinctrl-names = "default";
        pinctrl-0 = <&pinctrl_dspi0_1>;
        big-endian;
   sflash: at26df081a@0 {
                #address-cells = <1>;
                #size-cells = <1>;
                compatible = "atmel,at26df081a";
                spi-max-frequency = <16000000>;
                spi-cpol;
                spi-cpha;
                reg = <0>;
                linux,modalias = "m25p80";
                modal = "at26df081a";
                fsl,spi-cs-sck-delay = <100>;
                fsl,spi-sck-cs-delay = <50>;
        };
};

The SPI module as implemented on the chip