固定占空比下BCM控制

**

想用flyback 实现软开关

**
配置如下

#include "xc.h"





void pwm_init(void)
{
    
    
    /*****************ACLKCON?????????????************************************/
    ACLKCONbits.FRCSEL=1;           // 1 = Selects FRC clock for auxiliary PLL
                                    //0 = Input clock source is determined by the ASRCSEL bit setting
    ACLKCONbits.SELACLK=1;          //
                                    //1 = Auxiliary oscillators provide the source clock for the auxiliary clock divider
                                    //0 = Primary PLL (FVCO) provides the source clock for the auxiliary clock divider
                                        
    ACLKCONbits.APSTSCLR=7;		    //Auxiliary Clock Output Divider bits 111 = Divided by 1
                                    //110 = Divided by 2
                                    //101 = Divided by 4
                                    //100 = Divided by 8
                                    //011 = Divided by 16
                                    //010 = Divided by 32
                                    //001 = Divided by 64
                                    //000 = Divided by 256

	ACLKCONbits.ENAPLL=1;			//Auxiliary PLL Enable bit 
	while(ACLKCONbits.APLLCK!=1);	//Wait for Auxiliary PLL to Lock 
    
    /***  PTCON2?PWM ?????????? 2********************************/
    
    PTCON2bits.PCLKDIV2=0;          //PWM Input Clock Prescaler (Divider) Select bits
                                    //110 = Divide-by-64, maximum PWM timing resolution
                                    //101 = Divide-by-32, maximum PWM timing resolution
                                    //100 = Divide-by-16, maximum PWM timing resolution
                                    //011 = Divide-by-8, maximum PWM timing resolution
                                    // 010 = Divide-by-4, maximum PWM timing resolution
                                    //001 = Divide-by-2, maximum PWM timing resolution
                                    //000 = Divide-by-1, maximum PWM timing resolution 
                                       
    PTCON2bits.PCLKDIV1=0;        
    PTCON2bits.PCLKDIV0=1;
    
      /***************PWM2********************/ 
       
    IOCON2bits.SWAP=0;              //SWAP PWMxH and PWMxL Pins bit
                                    //1 = PWMxH output signal is connected to the PWMxL pin; PWMxL output signal is connected to the
                                    //PWMxH pin
                                    //0 = PWMxH and PWMxL pins are mapped to their respective pins
    
    IOCON2bits.PMOD0=1;             //PWM # I/O Pin Mode bits
    IOCON2bits.PMOD1=1;
                                    //11 = PWM I/O pin pair is in the True Independent Output mode
                                    // 10 = PWM I/O pin pair is in the Push-Pull Output mode
                                    // 01 = PWM I/O pin pair is in the Redundant Output mode
                                    // 00 = PWM I/O pin pair is in the Complementary Output mode
   
    IOCON2bits.PENH=1;              //PWMxH Output Pin Ownership bit
                                    //1 = PWM module controls PWMxH pin
                                    //0 = GPIO module controls PWMxH pin

    IOCON2bits.OVRENH=0;            //Override Enable for PWMxH Pin bit
                                    // 1 = OVRDAT<1> provides data for output on PWMxH pin
                                    // 0 = PWM generator provides data for output on PWMxH pin


    PWMCON2bits.MDCS=0;             //1 = MDC register provides duty cycle information for this PWM generator
                                    //0 = PDCx and SDCx registers provide duty cycle information for this PWM generator
   
    PWMCON2bits.MTBS=0;             //1 = PWM generator uses the secondary master time base for synchronization and the clock source for
                                    //the PWM generation logic (if secondary time base is available)
                                    //0 = PWM generator uses the primary master time base for synchronization and the clock source for
                                    //the PWM generation logic
    PWMCON2bits.DTC1=1;             // Dead-Time Control bits                                
    PWMCON2bits.DTC0=0;
                                    //11 = Dead-Time Compensation mode
                                    //10 = Dead-time function is disabled
                                    //01 = Negative dead time is actively applied for Complementary Output mode
                                    //00 = Positive dead time is actively applied for all output modes    
    
    PWMCON2bits.ITB=1;              //independent Time Base Mode bit
                                    //1 = PHASEx/SPHASEx registers provide time base period for this PWM generator
                                    //0 = PTPER register provides timing for this PWM generator
    
     PHASE2=3600;
    
    
     PDC2=400;
    
    PWMCON2bits.XPRES	 = 1;				/* current limit source reset  */
    
   FCLCON2bits.CLMOD=0;//current reset mode   0=reset 1=current limit
   
    FCLCON2bits.CLSRC= 0b01100;//Fault 5  CH1_VDS2
      
   
       
    LEBCON2bits.PHF=1;//: PWMxH Falling Edge Trigger Enable bit
                      // 1 = Falling edge of PWMxH will trigger Leading-Edge Blanking counter
                      // 0 = Leading-Edge Blanking ignores falling edge of PWMxH
    LEBCON2bits.CLLEBEN=1;//Current-Limit Leading-Edge Blanking Enable bit
                          //1 = Leading-Edge Blanking is applied to selected current-limit input
                          // 0 = Leading-Edge Blanking is not applied to selected current-limit input
    LEBCON2bits.BCH=1;      //Blanking in Selected Blanking Signal High Enable bit(1)
                            //1 = State blanking (of current-limit and/or Fault input signals) when selected blanking signal is high
                            //0 = No blanking when selected blanking signal is high

    // LEBCON2bits.BPHL=1;// Blanking in PWMxH Low Enable bit
                          // 1 = State blanking (of current-limit and/or Fault input signals) when PWMxH output is low
                          //  0 = No blanking when PWMxH output is low
    LEBDLY2=50;          // Leading-Edge Blanking Delay for Current-Limit and Fault Inputs bits
                        //The value is in 8.32 ns increments.

    PTCONbits.PTEN=1;               //PWM Module Enable bit
                                    // 1 = PWM module is enabled
                                    // 0 = PWM module is disabled
    
    
}