void SMCLK_XT2_4Mhz(void)
{
P7SEL |= BIT2+BIT3; // Port select XT2 配置管脚为时钟输出
UCSCTL6 &= ~XT2OFF; // Enable XT2 打开XT2振荡器
UCSCTL6 &= ~XT2OFF + XT2DRIVE_1; // Enable XT2 XT2 oscillator operating range is 8 MHz to 16 MHz.
UCSCTL3 |= SELREF_2; // FLLref = REFO 加载电阻???
// Since LFXT1 is not used,
// sourcing FLL with LFXT1 can cause
// XT1OFFG flag to set
UCSCTL4 |= SELA_2; // ACLK=REFO,SMCLK=DCO,MCLK=DCO
// Loop until XT1,XT2 & DCO stabilizes - in this case loop until XT2 settles
do
{
UCSCTL7 &= ~(XT2OFFG + XT1LFOFFG + XT1HFOFFG + DCOFFG);
// Clear XT2,XT1,DCO fault flags清除振荡器XT2,XT1,DCO失效标志
SFRIFG1 &= ~OFIFG; // Clear fault flags 清除振荡器失效标志
}while (SFRIFG1&OFIFG); // Test oscillator fault flag 判断所有晶振是否起振
UCSCTL6 &= ~XT2DRIVE0; // Decrease XT2 Drive according to
// expected frequency 根据晶振频率减小XT2驱动电流以降低功耗
UCSCTL4 |= SELS_5 + SELM_5; // 选择SMCLK=MCLK=XT2 选择时钟源XTWCLK(没有的话就是DCOCLKDIV)
}