General
Tablet, two MCU subsystems architecture
Supports eMMC/uFS boot
Supports LPDDR3
Supports LPDDR4X
AP MCU subsystem
Quad-core ARM® 2.0GHz Cortex-A73 MPCoreTM with 64KB L1 I-cache, 64KB L1 D-cache and 1MB unified L2 cache
Quad-core ARM® 2.0GHz Cortex-A53 MPCoreTM with 32KB L1 I-cache, 32KB L1 D-cache and 1MB unified L2 cache
NEON multimedia processing engine with SIMDv2/VFPv4 ISA support
DVFS technology with adaptive operating voltage from 0.6V to 1.12V
MD MCU subsystem
Imagination MIPS32® InterAptive processor with max. 864MHz operation frequency
High-performance multi-core and multithread processor architecture (two cores and two threads)
32KB L1 I-cache and 32KB L1 D-cache per core
384KB SPRAM (Scratchpad memory, Two-Core’s ISPRAM and DSPRAM)
256KB L2 Cache (share L2 cache for two cores)
High-performance AXI bus Interfaces
Power management for clock gating control
FD216 DSP for running GSM modem with max. 312MHz operation frequency
MD external interfaces
Dual SIM/USIM interface
Interface pins with RF and radio-related peripherals (antenna tuner, PA, etc.)
Security