文章目录
一、Modules:Modules
在代码内部实例化模块,这在顶层文件代码中尤为多见
- RTL代码
module top_module ( input a, input b, output out );
mod_a instance2 (
.out(out),
.in1(a),
.in2(b)
);
endmodule
- 仿真波形图
二、Module:conneting ports by position
- RTL代码
module top_module (
input a,
input b,
input c,
input d,
output out1,
output out2
);
mod_a mod_a_inst( out1, out2, a, b, c, d );
endmodule
- 仿真波形图
三、Modules:Connecting ports by name
- RTL代码
module top_module (
input a,
input b,
input c,
input d,
output out1,
output out2
);
mod_a mod_a_inst(
.out1(out1),
.out2(out2),
.in1(a),
.in2(b),
.in3(c),
.in4(d)
);
endmodule
- 仿真波形图
四、Modules:Three modules
实例化三个模块,注意端口的连线
- RTL代码
module top_module ( input clk, input d, output q );
wire q1,q2;
my_dff my_dff_inst1(
.clk(clk),
.d(d),
.q(q1)
);
my_dff my_dff_inst2(
.clk(clk),
.d(q1),
.q(q2)
);
my_dff my_dff_inst3(
.clk(clk),
.d(q2),
.q(q)
);
endmodule
- 仿真波形图
五、Modules:Modules and vectors
实例化三个模块,并且使用always块和case语句进行选择输出
- RTL代码
module top_module (
input clk,
input [7:0] d,
input [1:0] sel,
output [7:0] q
);
wire [7:0]q1;
wire [7:0]q2;
wire [7:0]q3;
my_dff8 my_dff_inst1(
.clk(clk),
.d(d),
.q(q1)
);
my_dff8 my_dff_inst2(
.clk(clk),
.d(q1),
.q(q2)
);
my_dff8 my_dff_inst3(
.clk(clk),
.d(q2),
.q(q3)
);
always @(*)
case(sel)
2'b00:q = d;
2'b01:q = q1;
2'b10:q = q2;
2'b11:q = q3;
endcase
endmodule
- 仿真波形图
六、Modules:Adder1
- RTL代码
module top_module(
input [31:0] a,
input [31:0] b,
output [31:0] sum
);
wire cin;
wire [15:0]a1,a2,b1,b2;
wire [15:0]sum1;
wire [15:0]sum2;
wire cout;
assign a1 = a[15:0];
assign a2 = a[31:16];
assign b1 = b[15:0];
assign b2 = b[31:16];
add16 add16_inst1(
.a(a1),
.b(b1),
.cin(cin),
.sum(sum1),
.cout(cout)
);
add16 add16_inst2(
.a(a2),
.b(b2),
.cin(cout),
.sum(sum2),
.cout()
);
assign sum[15:0] = sum1;
assign sum[31:16] = sum2;
endmodule
- 仿真波形图
七、Modules:Adder2
- RTL代码
module top_module (
input [31:0] a,
input [31:0] b,
output [31:0] sum
);//
wire [15:0]sum1;
wire [15:0]sum2;
wire cout;
add16 addr16_inst1(
.a(a[15:0]),
.b(b[15:0]),
.cin(1'b0),
.sum(sum1),
.cout(cout)
);
add16 addr16_inst2(
.a(a[31:16]),
.b(b[31:16]),
.cin(cout),
.sum(sum2),
.cout()
);
assign sum = {sum2,sum1};
endmodule
module add1 ( input a, input b, input cin, output sum, output cout );
assign sum = a^b^cin;
assign cout = a&b | a&cin |b&cin;
endmodule
- 仿真波形图
八、Modules:Carry-select addr
有选择性的输出,用case语句和二选一判断语句都可以
- RTL代码
module top_module(
input [31:0] a,
input [31:0] b,
output [31:0] sum
);
wire cin;
wire [15:0]sum1;
wire [15:0]sum2;
wire [15:0]sum3;
wire cout;
add16 add16_inst1(
.a(a[15:0]),
.b(b[15:0]),
.cin(1'b0),
.sum(sum1),
.cout(cout)
);
add16 add16_inst2(
.a(a[31:16]),
.b(b[31:16]),
.cin(1'b0),
.sum(sum2),
.cout()
);
add16 add16_inst3(
.a(a[31:16]),
.b(b[31:16]),
.cin(1'b1),
.sum(sum3),
.cout()
);
assign sum = (!cout)? {sum2,sum1}:{sum3,sum1};
endmodule
- 仿真波形图
九、Modules:Adder-subtractor
- RTL代码
module top_module(
input [31:0] a,
input [31:0] b,
input sub,
output [31:0] sum
);
wire [15:0]sum1;
wire [15:0]sum2;
wire cout;
wire [31:0]b_s;
add16 addr16_inst1(
.a(a[15:0]),
.b(b_s[15:0]),
.cin(sub),
.sum(sum1),
.cout(cout)
);
add16 addr16_inst2(
.a(a[31:16]),
.b(b_s[31:16]),
.cin(cout),
.sum(sum2),
.cout()
);
assign b_s = b ^ {32{sub}};
assign sum = {sum2,sum1};
endmodule
- 仿真波形图