目录
一、顶层Make分析
整体的编译框架和linux内核的一样都是分层的各自编译后由链接器来汇总
# Copyright (c) 2013-2019, Huawei Technologies Co., Ltd. All rights reserved.
# Copyright (c) 2020, Huawei Device Co., Ltd. All rights reserved.
#
# Redistribution and use in source and binary forms, with or without modification,
# are permitted provided that the following conditions are met:
#
# 1. Redistributions of source code must retain the above copyright notice, this list of
# conditions and the following disclaimer.
#
# 2. Redistributions in binary form must reproduce the above copyright notice, this list
# of conditions and the following disclaimer in the documentation and/or other materials
# provided with the distribution.
#
# 3. Neither the name of the copyright holder nor the names of its contributors may be used
# to endorse or promote products derived from this software without specific prior written
# permission.
#
# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
# THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
# PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR
# CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
# EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
# PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
# OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
# WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
# OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
# ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
LITEOSTOPDIR := $(shell if [ "$$PWD" != "" ]; then echo $$PWD; else pwd; fi)
export OS=$(shell uname -s)
ifneq ($(OS), Linux)
LITEOSTOPDIR := $(shell dirname $(subst \,/,$(LITEOSTOPDIR))/./)
endif
LITEOSTHIRDPARTY := $(LITEOSTOPDIR)/../../third_party
export LITEOSTOPDIR
export LITEOSTHIRDPARTY
-include $(LITEOSTOPDIR)/tools/build/config.mk
RM = -rm -rf
MAKE = make
__LIBS = libs
APPS = apps
ROOTFSDIR = rootfsdir
ROOTFS = rootfs
LITEOS_TARGET = liteos
LITEOS_LIBS_TARGET = libs_target
LITEOS_MENUCONFIG_H = $(LITEOSTOPDIR)/include/generated/autoconf.h
LITEOS_PLATFORM_BASE = $(LITEOSTOPDIR)/platform
LITEOS_PLATFORM_MENUCONFIG_H = $(LITEOS_PLATFORM_BASE)/include/menuconfig.h
ifeq ($(LOSCFG_PLATFORM_HI3518EV300), y)
FSTYPE = jffs2
endif
ifeq ($(LOSCFG_PLATFORM_HI3516DV300), y)
FSTYPE = vfat
endif
ifeq ($(LOSCFG_PLATFORM_IMX6ULL), y)
FSTYPE = jffs2
endif
ifeq ($(LOSCFG_PLATFORM_STM32MP157), y)
FSTYPE = jffs2
ROOTFS_SIZE = 0xA00000
endif
ROOTFS_DIR = $(OUT)/rootfs
ROOTFS_ZIP = $(OUT)/rootfs.zip
VERSION =
all: $(OUT) $(BUILD) $(LITEOS_TARGET) $(APPS)
lib: $(OUT) $(BUILD) $(LITEOS_LIBS_TARGET)
help:
$(HIDE)echo "-------------------------------------------------------"
$(HIDE)echo "1.====make help: get help infomation of make"
$(HIDE)echo "2.====make: make a debug version based the .config"
$(HIDE)echo "3.====make debug: make a debug version based the .config"
$(HIDE)echo "4.====make release: make a release version for all platform"
$(HIDE)echo "5.====make release PLATFORM=xxx: make a release version only for platform xxx"
$(HIDE)echo "6.====make rootfsdir: make a original rootfs dir"
$(HIDE)echo "7.====make rootfs FSTYPE=***: make a original rootfs img"
$(HIDE)echo "8.====make test: make the testsuits_app and put it into the rootfs dir"
$(HIDE)echo "9.====make test_apps FSTYPE=***: make a rootfs img with the testsuits_app in it"
$(HIDE)echo "xxx should be one of (hi3516cv300 hi3516ev200 hi3556av100/cortex-a53_aarch32 hi3559av100/cortex-a53_aarch64)"
$(HIDE)echo "*** should be one of (jffs2)"
$(HIDE)echo "-------------------------------------------------------"
debug:
$(HIDE)echo "=============== make a debug version ==============="
$(HIDE) $(MAKE) all
release:
ifneq ($(PLATFORM),)
$(HIDE)echo "=============== make a release version for platform $(PLATFORM) ==============="
$(HIDE)$(SCRIPTS_PATH)/mklibversion.sh $(PLATFORM)
else
$(HIDE)echo "================make a release version for all platform ==============="
$(HIDE)$(SCRIPTS_PATH)/mklibversion.sh
endif
##### make dynload #####
-include $(LITEOS_MK_PATH)/dynload.mk
#-----need move when make version-----#
##### make lib #####
$(__LIBS): $(OUT) $(CXX_INCLUDE)
ifeq ($(LOSCFG_PLATFORM_IMX6ULL),y)
BOARD_INCLUDE_DIR := $(LITEOSTOPDIR)/../../vendor/nxp/imx6ull/board
else ifeq ($(LOSCFG_PLATFORM_STM32MP157), y)
BOARD_INCLUDE_DIR := $(LITEOSTOPDIR)/../../vendor/st/stm32mp157/board
else
BOARD_INCLUDE_DIR := $(LITEOSTOPDIR)/../../vendor/hisi/hi35xx/$(LITEOS_PLATFORM)/config/board
endif
$(OUT): $(LITEOS_MENUCONFIG_H)
$(HIDE)mkdir -p $(OUT)/lib
$(HIDE)$(CC) -I$(LITEOS_PLATFORM_BASE)/include -I$(BOARD_INCLUDE_DIR) \
-E $(LITEOS_PLATFORM_BASE)/board.ld.S \
-o $(LITEOS_PLATFORM_BASE)/board.ld -P
$(BUILD):
$(HIDE)mkdir -p $(BUILD)
$(LITEOS_LIBS_TARGET): $(__LIBS)
$(HIDE)for dir in $(LIB_SUBDIRS); \
do $(MAKE) -C $$dir all || exit 1; \
done
$(HIDE)echo "=============== make lib done ==============="
##### make menuconfig #####
export CONFIG_=LOSCFG_
MENUCONFIG_PATH = $(LITEOSTOPDIR)/tools/menuconfig
KCONFIG_FILE_PATH = $(LITEOSTOPDIR)/Kconfig
menuconfig:$(MENUCONFIG_PATH)/mconf
$< $(KCONFIG_FILE_PATH)
genconfig:$(MENUCONFIG_PATH)/conf
$(HIDE)mkdir -p include/config include/generated
$< --silentoldconfig $(KCONFIG_FILE_PATH)
-mv -f $(LITEOS_MENUCONFIG_H) $(LITEOS_PLATFORM_MENUCONFIG_H)
##### menuconfig end #######
$(LITEOS_MENUCONFIG_H):
ifneq ($(LITEOS_PLATFORM_MENUCONFIG_H), $(wildcard $(LITEOS_PLATFORM_MENUCONFIG_H)))
$(HIDE)$(MAKE) genconfig
endif
$(LITEOS_TARGET): $(__LIBS)
$(HIDE)touch $(LOSCFG_ENTRY_SRC)
$(HIDE)for dir in $(LITEOS_SUBDIRS); \
do $(MAKE) -C $$dir all || exit 1; \
done
$(LD) $(LITEOS_LDFLAGS) $(LITEOS_TABLES_LDFLAGS) $(LITEOS_DYNLDFLAGS) -Map=$(OUT)/$@.map -o $(OUT)/$@ --start-group $(LITEOS_LIBDEP) --end-group
# $(SIZE) -t --common $(OUT)/lib/*.a >$(OUT)/$@.objsize
$(OBJCOPY) -O binary $(OUT)/$@ $(LITEOS_TARGET_DIR)/$@.bin
ifeq ($(LOSCFG_PLATFORM_STM32MP157), y)
mkimage.stm32 -T stm32image -a 0xC0100000 -e 0xC0100000 -d $(LITEOS_TARGET_DIR)/$@.bin $(LITEOS_TARGET_DIR)/liteos.stm32
mkimage.stm32 -A arm -O linux -T kernel -C none -a 0xC0100000 -e 0xC0100000 -n liteos-a -d $(LITEOS_TARGET_DIR)/$@.bin $(LITEOS_TARGET_DIR)/liteos_with_uboot_header.bin
endif
$(OBJDUMP) -t $(OUT)/$@ |sort >$(OUT)/$@.sym.sorted
$(OBJDUMP) -d $(OUT)/$@ >$(OUT)/$@.asm
# $(NM) -S --size-sort $(OUT)/$@ >$(OUT)/$@.size
$(APPS): $(LITEOS_TARGET)
$(HIDE)$(MAKE) -C apps all
prepare:
$(HIDE)mkdir -p $(OUT)/musl
ifeq ($(LOSCFG_COMPILER_CLANG_LLVM), y)
$(HIDE)cp -f $(LITEOSTOPDIR)/../../prebuilts/lite/sysroot/usr/lib/$(LLVM_TARGET)/a7_softfp_neon-vfpv4/libc.so $(OUT)/musl
$(HIDE)cp -f $(LITEOS_COMPILER_PATH)/lib/$(LLVM_TARGET)/c++/a7_softfp_neon-vfpv4/libc++.so $(OUT)/musl
else
$(HIDE)cp -f $(LITEOS_COMPILER_PATH)/target/usr/lib/libc.so $(OUT)/musl
$(HIDE)cp -f $(LITEOS_COMPILER_PATH)/arm-linux-musleabi/lib/libstdc++.so.6 $(OUT)/musl
$(HIDE)cp -f $(LITEOS_COMPILER_PATH)/arm-linux-musleabi/lib/libgcc_s.so.1 $(OUT)/musl
$(STRIP) $(OUT)/musl/*
endif
$(ROOTFSDIR): prepare $(APPS)
$(HIDE)$(MAKE) clean -C apps
$(HIDE)$(shell $(LITEOSTOPDIR)/tools/scripts/make_rootfs/rootfsdir.sh $(OUT)/bin $(OUT)/musl $(ROOTFS_DIR))
ifneq ($(VERSION),)
$(HIDE)$(shell $(LITEOSTOPDIR)/tools/scripts/make_rootfs/releaseinfo.sh "$(VERSION)" $(ROOTFS_DIR))
endif
$(ROOTFS): $(ROOTFSDIR)
$(HIDE)$(shell $(LITEOSTOPDIR)/tools/scripts/make_rootfs/rootfsimg.sh $(ROOTFS_DIR) $(FSTYPE) ${ROOTFS_SIZE})
$(HIDE)cd $(ROOTFS_DIR)/.. && zip -r $(ROOTFS_ZIP) $(ROOTFS)
ifneq ($(OUT), $(LITEOS_TARGET_DIR))
$(HIDE)mv $(ROOTFS_DIR) $(LITEOS_TARGET_DIR)rootfs
endif
clean:
$(HIDE)for dir in $(LITEOS_SUBDIRS); \
do $(MAKE) -C $$dir clean|| exit 1; \
done
$(HIDE)$(MAKE) -C apps clean
$(HIDE)$(RM) $(__OBJS) $(LITEOS_TARGET) $(OUT) $(BUILD) $(LITEOS_MENUCONFIG_H) *.bak *~
$(HIDE)$(RM) $(LITEOS_PLATFORM_MENUCONFIG_H)
$(HIDE)$(RM) include
$(HIDE)$(MAKE) cleanrootfs
$(HIDE)echo "clean $(LITEOS_PLATFORM) finish"
cleanall:
$(HIDE)$(RM) $(LITEOSTOPDIR)/out
$(HIDE)find $(LITEOS_PLATFORM_BASE)/ -name board.ld -exec rm -rf {} \;
$(HIDE)cd sample/sample_osdrv;make clean;cd ../..;
$(HIDE)echo "clean all"
cleanrootfs:
$(HIDE)$(RM) $(OUT)/rootfs
$(HIDE)$(RM) $(OUT)/rootfs.zip
$(HIDE)$(RM) $(OUT)/rootfs.img
.PHONY: all lib clean cleanall $(LITEOS_TARGET) debug release help
下面是apps目录的make
include ../.config
include ./module.mk
HIDE := @
APPS := app
all: $(APPS)
# Make
$(APPS):
ifneq ($(APP_SUBDIRS), )
$(HIDE) for dir in $(APP_SUBDIRS); do $(MAKE) -C $$dir ; done
endif
clean:
ifneq ($(APP_SUBDIRS), )
$(HIDE) for dir in $(APP_SUBDIRS); do $(MAKE) -C $$dir clean; done
endif
.PHONY: all $(APPS) clean
其它的也类似每一层make都有两个配套的mk文件来描述资源
如果这个APP_SUBDIRS不是空的就会遍历每个目录去make
最底层的make和源码放一起的这些就会去真正的进行编译操作。里面放了对应的编译规则
好处就是整个软件的最终结果被按功能分别编译，我们可以针对性的开启对应功能的编译，都编译后统一链接。
其实随着不断学习，感觉理解起来变得越来越容易了，以前觉得大型工程中的makefile是座山，现在充其量就是个小土包。有这种感觉的前提是我自己从0到1做了一次编译框架。然后现在再来看就有这种感觉了。
二、添加一个新的单板
这个地方要感谢韦东山老师了，因为鸿蒙只适配海思的芯片，别人想移植就得知道全部源码才行。但是为了不泄露机密，核心的代码是不开源的。我们没法直接移植。韦老师接触过这部分做个一个补丁文件可以根据这个文件不断拓展新单板。按老师的话说留下了一个火种。
既然这样我想试试能不能移植到我的另一块单板exynos4412上。不一定会成功如果耗时过多的话我就放到毕业后再去做。下面记录一下移植过程。
2.1 Kconfig
vi platform/Kconfig
仿照韦东山老师添加的两个我也添加了一个exynos4412.
现在其实有个问题，大家看图应该可以看出来，其它是四个都是ARM Cotex-A7的我加的这个是A9的。在鸿蒙的官网上没说是不是支持A9，（不排除我没找到的情况）。在老师的技术交流群里也没有人能回答我，咱们就当他支持先试试好啦。
现在就有这个咯
为什么缺了一块内容
因为当前Kconfig里只有A7的配置。没办法了或许能改但是要改的地方还是有点多的暂时先不弄了。
再来看看makefile
2.2 Makefile
2.2.1 顶层Makefile
指定文件系统的类型和大小
然后指定我们取board资源的目录
这里也有修改，但是不清楚改了啥，后面看下源码对比一手
然后是这里看样子是对bin文件的一些处理这里只有stm32mp157的，老师说我们的可以放到后面做接着往下看。
这里也有改动，看样子是跟文件系统的修改
顶层的makefile就改完了
2.2.2 platform下的Makefile
这里是一个匹配规则如果这里的某个芯片i型号被选择了就把对应的源码加到编译的对象里
我们来添加一下。
2.2.3 platform下的bsp.mk文件
HWI_TYPE := arm/interrupt/gic
HWI_TYPE可能是指硬件中断（HWI）的类型或使用的硬件中断控制器（GIC）。arm/interrupt/gic表示使用ARM架构下的GIC（Generic Interrupt Controller）作为中断控制器。
TIMER_TYPE := hisoc/timer
TIMER_TYPE表示定时器的类型或所使用的硬件定时器。hisoc/timer可能是特定于某种SoC（System on a Chip）的定时器实现。
HRTIMER_TYPE := hisoc/hrtimer
HRTIMER_TYPE可能是高精度定时器的类型或实现。hisoc/hrtimer可能是特定于某种SoC的高精度定时器。
NET_TYPE := hieth
NET_TYPE表示网络类型的配置或使用的网络接口。hieth可能是某种特定的网络硬件或驱动。
UART_TYPE := amba_pl011
UART_TYPE表示UART（通用异步收发传输器）的类型或使用的硬件。amba_pl011是ARM公司的一个UART控制器。
USB_TYPE := usb3.0_hi3518ev300
USB_TYPE表示USB的类型或使用的USB控制器。usb3.0_hi3518ev300可能是特定于HI3518EV300芯片的USB 3.0控制器。
LITEOS_CMACRO_TEST += -DTEST3518EV300
- 这一行在
LITEOS_CMACRO_TEST变量中添加了一个编译宏定义-DTEST3518EV300。这通常用于在编译时定义特定的宏，可能用于条件编译或特定的测试目的。
串口和USB并没有处理，不知道什么原因往下接着看。
然后就是这里指定一下平台总线这一层的头文件路径。
2.3 编译与调试
make clean报错找不到脚本
然后去对应文件找，发现和下面这个变量有关
向上找，发现没设置编译器的路径就会调用这个脚本来获取路径
设置不了
在Kconfig里查找发现没有添加我们的单板类型
现在就有了。使用默认的这个编译器
可以clean成功了
找不到board下的这个头文件
因为我们用的A9不是A7回去先改成A7试试
报错在输出目录找不到inculude的这个头文件
这里应该有很多东西可是我们没有
不对哦，想起来了，我把.config拿来了一份也不对，board我往上翻一下修改
破案了
完蛋还是这个错误
这个文件find不到
等等
../../
我悟了
经过我的一番复制
终于和韦东山老师的一样了。
改回A9报错巨多还是先按A7来吧
上面报错对应shell下的这几个目录
ok再次编译只剩链接错误了
2.4 解决链接错误
找不到这个库
修改一下mk文件的名字
还有里面的名字
:1,$s/IMAX6ULL_BASE_DIR/EXYNOS4412_BASE_DIR
好再来编译一下
他说宏没定义
vi /home/book/program/openharmony/vendor/samsung/exynos4412/driver/mtd/spi_nor/src/common/spinor.c =150
又来一个宏没定义
我是基于6ull改的所以和韦东山老师的不太一样
又来个新的错误
这些其实都是对应mk文件和我们的新的文件路径名匹配错误导致的
解决掉了一个还有两个
drivers/hdf/lite/hdf_lite.mk
vendor/democom/hdf/hdf_vendor.mk
grep一下
还是这个mtd的问题
这里明明定义了但是说没被定义
说明还是makefile的问题，没引过去
这里我取巧一下直接看已修改的driver文件
补完报错没变证明不是因为这个
这个mtd到底是哪里呢
又查了另一个，这俩难兄难弟都在这个头文件里定义的
回去看了遍视频发现我没把分区mount的操作这里注释掉，也就是说我不用和文件系统相关的操作就暂时不会出那两个错误
ld.lld: error: undefined symbol: GetDevSpinorOps
>>> referenced by ld-temp.o
>>> lto.tmp:(SystemInit)ld.lld: error: undefined symbol: GetMtdCharFops
>>> referenced by ld-temp.o
>>> lto.tmp:(SystemInit)
Makefile:165: recipe for target 'liteos' failed
make: *** [liteos] Error 1
这俩是关联的。
暂时没错误了
三、内核启动流程的学习
这里我就完全照搬老师的思想了，后面我更全面的了解后在自己总结一个
3.1 韦东山老师总结的启动四步
内核启动流程可以分为4步骤(非官方)：
-
启动
-
使用汇编代码编写，涉及非常底层的设置，比如CPU设置、代码重定位等等
-
地址映射也在这里实现
-
它最终会调用main函数
-
-
main函数
-
以后的代码，基本都是使用C语言编写了
-
主要工作是：调用OsMain进行各类初始化、最终会启动用户程序
-
-
OsMain函数
-
进行操作系统层面的初始化，比如异常初始化、任务初始化、IPC初始化
-
调用SystemInit
-
-
SystemInit
-
偏向于应用程序的初始化
-
挂载根文件系统
-
启动第一个用户进程
-
所有的软件运行都是和这个类似的其实，上电后就是只能跑一个程序从启动文件开始跳到C的主函数，在ARM的汇编里就是b main。我看过很多很多的代码包括裸机环境的，带RTOS的以及linux的。都是从汇编跳到最初的主函数，然后系统级别的程序来初始化后面的环境变量。裸机环境没有多任务的话就是while1死循环，有多任务的话就是搞个状态机的机制做任务跳转，因为只有一个核心永远都是单线程的。看似多人只不过是切换的快。可能10ns就换一次任务。
而操作系统环境要做的就比较多了，多核理论上是可以真的多线程的。只是线程由大脑统一调度。光有脑子没有配套的硬件设备也不行啊。就得把内存给大家分一下。不然一人用一会不还是单线程么。有mpu（有的也叫mmu叫什么的都有反正就是管理内存的。cpu不能直接用物理地址，虚拟的地址都由它来分配）的话这时候他就该发挥作用了。偏了。回到我们的主题往下看。
3.2 启动文件分析
启动文件藏的比较深
最前面一定是初始化栈空间和向量表
/*
* Copyright (c) 2013-2019, Huawei Technologies Co., Ltd. All rights reserved.
* Copyright (c) 2020, Huawei Device Co., Ltd. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice, this list of
* conditions and the following disclaimer.
*
* 2. Redistributions in binary form must reproduce the above copyright notice, this list
* of conditions and the following disclaimer in the documentation and/or other materials
* provided with the distribution.
*
* 3. Neither the name of the copyright holder nor the names of its contributors may be used
* to endorse or promote products derived from this software without specific prior written
* permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR
* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
* ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#define ASSEMBLY
#include "arch_config.h"
#include "los_vm_boot.h"
#include "los_vm_zone.h"
#include "los_mmu_descriptor_v6.h"
#undef ASSEMBLY
.global __exc_stack_top
.global __irq_stack_top
.global __fiq_stack_top
.global __svc_stack_top
.global __abt_stack_top
.global __undef_stack_top
.global __exc_stack
.global __irq_stack
.global __fiq_stack
.global __svc_stack
.global __abt_stack
.global __undef_stack
.extern __bss_start
.extern __bss_end
.extern hal_clock_initialize_start
.extern los_bss_init
.extern _osExceptFiqHdl
.extern _osExceptAddrAbortHdl
.extern _osExceptDataAbortHdl
.extern _osExceptPrefetchAbortHdl
.extern _osExceptSwiHdl
.extern _osExceptUndefInstrHdl
.extern __stack_chk_guard_setup
.extern g_firstPageTable
.extern g_mmuJumpPageTable
.equ MPIDR_CPUID_MASK, 0xffU
.fpu vfpv4
.arm
/* param0 is stack bottom, param1 is stack size, r11 hold cpu id */
.macro EXC_SP_SET param0, param1
ldr r1, =\param0
mov r0, \param1
bl sp_set
.endm
/* param0 is stack top, param1 is stack size, param2 is magic num */
.macro STACK_MAGIC_SET param0, param1, param2
ldr r0, =\param0
mov r1, \param1
ldr r2, =\param2
bl excstack_magic
.endm
/* param0 is physical address, param1 virtual address, param2 is sizes, param3 is flag */
.macro PAGE_TABLE_SET param0, param1, param2, param3
ldr r6, =\param0
ldr r7, =\param1
ldr r8, =\param2
ldr r10, =\param3
bl page_table_build
.endm
.code 32
.section ".vectors","ax"
__exception_handlers:
/*
*Assumption: ROM code has these vectors at the hardware reset address.
*A simple jump removes any address-space dependencies [i.e. safer]
*/
b reset_vector
b _osExceptUndefInstrHdl
b _osExceptSwiHdl
b _osExceptPrefetchAbortHdl
b _osExceptDataAbortHdl
b _osExceptAddrAbortHdl
b OsIrqHandler
b _osExceptFiqHdl
/* Startup code which will get the machine into supervisor mode */
.global reset_vector
.type reset_vector,function
reset_vector:
#if defined(LOSCFG_PLATFORM_STM32MP157)
ldr sp, =0xc0000000 + 0x1000000
mov r0, #'S'
bl uart_putc_phy
#endif
#if 1
/*
* disable interrupts (FIQ and IRQ), also set the cpu to SVC32 mode,
* except if in HYP mode already
*/
mrs r0, cpsr
and r1, r0, #0x1f @ mask mode bits
teq r1, #0x1a @ test for HYP mode
bicne r0, r0, #0x1f @ clear all mode bits
orrne r0, r0, #0x13 @ set SVC mode
orr r0, r0, #0xc0 @ disable FIQ and IRQ
msr cpsr,r0
/*
* If I-cache is enabled invalidate it
*/
mcr p15, 0, r0, c7, c5, 0 @ invalidate icache
mcr p15, 0, r0, c7, c10, 4 @ DSB
mcr p15, 0, r0, c7, c5, 4 @ ISB
/* do some early cpu setup: i/d cache disable, mmu disabled */
// mrc p15, 0, r0, c1, c0, 0
// bic r0, #(1<<12)
// bic r0, #(1<<2 | 1<<0)
// mcr p15, 0, r0, c1, c0, 0
#endif
/* r11: delta of physical address and virtual address */
adr r11, pa_va_offset
ldr r0, [r11]
sub r11, r11, r0
/* if we need to relocate to proper location or not */
adr r4, __exception_handlers /* r4: base of load address */
ldr r5, =SYS_MEM_BASE /* r5: base of physical address */
subs r12, r4, r5 /* r12: delta of load address and physical address */
beq reloc_img_to_bottom_done /* if we load image at the bottom of physical address */
#if defined(LOSCFG_PLATFORM_STM32MP157)
mov r0, #'R'
bl uart_putc_phy
#endif
/* we need to relocate image at the bottom of physical address */
ldr r7, =__exception_handlers /* r7: base of linked address (or vm address) */
ldr r6, =__bss_start /* r6: end of linked address (or vm address) */
sub r6, r7 /* r6: delta of linked address (or vm address) */
add r6, r4 /* r6: end of load address */
reloc_img_to_bottom_loop:
ldr r7, [r4], #4
str r7, [r5], #4
cmp r4, r6
bne reloc_img_to_bottom_loop
sub pc, r12
nop
sub r11, r11, r12 /* r11: eventual address offset */
reloc_img_to_bottom_done:
#if defined(LOSCFG_PLATFORM_STM32MP157)
mov r0, #'D'
bl uart_putc_phy
#endif
ldr r4, =g_firstPageTable /* r4: physical address of translation table and clear it */
add r4, r4, r11
bl page_table_clear
PAGE_TABLE_SET SYS_MEM_BASE, UNCACHED_VMM_BASE, UNCACHED_VMM_SIZE, MMU_INITIAL_MAP_STRONGLY_ORDERED
#if defined(LOSCFG_PLATFORM_IMX6ULL) || defined(LOSCFG_PLATFORM_STM32MP157)
PAGE_TABLE_SET DDR_RAMFS_ADDR, DDR_RAMFS_VBASE, DDR_RAMFS_SIZE, MMU_INITIAL_MAP_DEVICE
PAGE_TABLE_SET LCD_FB_BASE, LCD_FB_VBASE, LCD_FB_SIZE, MMU_INITIAL_MAP_DEVICE
#endif
PAGE_TABLE_SET SYS_MEM_BASE, KERNEL_VMM_BASE, KERNEL_VMM_SIZE, MMU_DESCRIPTOR_KERNEL_L1_PTE_FLAGS
PAGE_TABLE_SET PERIPH_PMM_BASE, PERIPH_DEVICE_BASE, PERIPH_DEVICE_SIZE, MMU_INITIAL_MAP_DEVICE
PAGE_TABLE_SET PERIPH_PMM_BASE, PERIPH_CACHED_BASE, PERIPH_CACHED_SIZE, MMU_DESCRIPTOR_KERNEL_L1_PTE_FLAGS
PAGE_TABLE_SET PERIPH_PMM_BASE, PERIPH_UNCACHED_BASE, PERIPH_UNCACHED_SIZE, MMU_INITIAL_MAP_STRONGLY_ORDERED
#if defined(LOSCFG_PLATFORM_STM32MP157)
PAGE_TABLE_SET GIC_PHY_BASE, GIC_VIRT_BASE, GIC_VIRT_SIZE, MMU_INITIAL_MAP_DEVICE
#endif
orr r8, r4, #MMU_TTBRx_FLAGS /* r8 = r4 and set cacheable attributes on translation walk */
ldr r4, =g_mmuJumpPageTable /* r4: jump pagetable vaddr */
add r4, r4, r11
ldr r4, [r4]
add r4, r4, r11 /* r4: jump pagetable paddr */
bl page_table_clear
/* build 1M section mapping, in order to jump va during turing on mmu:pa == pa, va == pa */
mov r6, pc
mov r7, r6 /* r7: pa (MB aligned)*/
lsr r6, r6, #20 /* r6: va l1 index */
ldr r10, =MMU_DESCRIPTOR_KERNEL_L1_PTE_FLAGS
add r12, r10, r6, lsl #20 /* r12: pa |flags */
str r12, [r4, r7, lsr #(20 - 2)] /* jumpTable[paIndex] = pt entry */
rsb r7, r11, r6, lsl #20 /* r7: va */
str r12, [r4, r7, lsr #(20 - 2)] /* jumpTable[vaIndex] = pt entry */
bl mmu_setup /* set up the mmu */
#if defined(LOSCFG_PLATFORM_STM32MP157)
mov r0, #'M'
bl uart_putc_virt
#endif
/* get cpuid and keep it in r11 */
mrc p15, 0, r11, c0, c0, 5
and r11, r11, #MPIDR_CPUID_MASK
cmp r11, #0
bne excstatck_loop_done
excstatck_loop:
/* clear out the interrupt and exception stack and set magic num to check the overflow */
ldr r0, =__undef_stack
ldr r1, =__exc_stack_top
bl stack_init
STACK_MAGIC_SET __undef_stack, #OS_EXC_UNDEF_STACK_SIZE, OS_STACK_MAGIC_WORD
STACK_MAGIC_SET __abt_stack, #OS_EXC_ABT_STACK_SIZE, OS_STACK_MAGIC_WORD
STACK_MAGIC_SET __irq_stack, #OS_EXC_IRQ_STACK_SIZE, OS_STACK_MAGIC_WORD
STACK_MAGIC_SET __fiq_stack, #OS_EXC_FIQ_STACK_SIZE, OS_STACK_MAGIC_WORD
STACK_MAGIC_SET __svc_stack, #OS_EXC_SVC_STACK_SIZE, OS_STACK_MAGIC_WORD
STACK_MAGIC_SET __exc_stack, #OS_EXC_STACK_SIZE, OS_STACK_MAGIC_WORD
excstatck_loop_done:
warm_reset:
/* initialize interrupt/exception environments */
mov r0, #(CPSR_IRQ_DISABLE |CPSR_FIQ_DISABLE|CPSR_IRQ_MODE)
msr cpsr, r0
EXC_SP_SET __irq_stack_top, #OS_EXC_IRQ_STACK_SIZE
mov r0, #(CPSR_IRQ_DISABLE|CPSR_FIQ_DISABLE|CPSR_UNDEF_MODE)
msr cpsr, r0
EXC_SP_SET __undef_stack_top, #OS_EXC_UNDEF_STACK_SIZE
mov r0, #(CPSR_IRQ_DISABLE|CPSR_FIQ_DISABLE|CPSR_ABT_MODE)
msr cpsr, r0
EXC_SP_SET __abt_stack_top, #OS_EXC_ABT_STACK_SIZE
mov r0, #(CPSR_IRQ_DISABLE|CPSR_FIQ_DISABLE|CPSR_FIQ_MODE)
msr cpsr, r0
EXC_SP_SET __fiq_stack_top, #OS_EXC_FIQ_STACK_SIZE
/* initialize CPSR (machine state register) */
mov r0, #(CPSR_IRQ_DISABLE|CPSR_FIQ_DISABLE|CPSR_SVC_MODE)
msr cpsr, r0
/* Note: some functions in LIBGCC1 will cause a "restore from SPSR"!! */
msr spsr, r0
/* set svc stack, every cpu has OS_EXC_SVC_STACK_SIZE stack */
ldr r0, =__svc_stack_top
mov r2, #OS_EXC_SVC_STACK_SIZE
mul r2, r2, r11
sub r0, r0, r2
mov sp, r0
#ifndef LOSCFG_PLATFORM_STM32MP157
/* enable fpu+neon */
MRC p15, 0, r0, c1, c1, 2
ORR r0, r0, #0xC00
BIC r0, r0, #0xC000
MCR p15, 0, r0, c1, c1, 2
LDR r0, =(0xF << 20)
MCR p15, 0, r0, c1, c0, 2
#endif
MOV r3, #0x40000000
VMSR FPEXC, r3
LDR r0, =__exception_handlers
MCR p15, 0, r0, c12, c0, 0
cmp r11, #0
bne cpu_start
clear_bss:
ldr r1, =__bss_start
ldr r2, =__bss_end
mov r0, #0
bss_loop:
cmp r1, r2
strlo r0, [r1], #4
blo bss_loop
#if defined(LOSCFG_CC_STACKPROTECTOR_ALL) || \
defined(LOSCFG_CC_STACKPROTECTOR_STRONG) || \
defined(LOSCFG_CC_STACKPROTECTOR)
bl __stack_chk_guard_setup
#endif
#ifdef LOSCFG_GDB_DEBUG
/* GDB_START - generate a compiled_breadk,This function will get GDB stubs started, with a proper environment */
bl GDB_START
.word 0xe7ffdeff
#endif
#if defined(LOSCFG_PLATFORM_STM32MP157)
mov r0, 'm'
bl uart_putc_virt
#endif
bl main
_start_hang:
b _start_hang
mmu_setup:
mov r12, #0
mcr p15, 0, r12, c8, c7, 0 /* Set c8 to control the TLB and set the mapping to invalid */
isb
mcr p15, 0, r12, c2, c0, 2 /* Initialize the c2 register */
isb
orr r12, r4, #MMU_TTBRx_FLAGS
mcr p15, 0, r12, c2, c0, 0 /* Set attributes and set temp page table */
isb
mov r12, #0x7 /* 0b0111 */
mcr p15, 0, r12, c3, c0, 0 /* Set DACR with 0b0111, client and manager domian */
isb
mrc p15, 0, r12, c1, c0, 0
bic r12, #(1 << 29 | 1 << 28)
orr r12, #(1 << 0)
bic r12, #(1 << 1)
orr r12, #(1 << 2)
orr r12, #(1 << 12)
mcr p15, 0, r12, c1, c0, 0 /* Set SCTLR with r12: Turn on the MMU, I/D cache Disable TRE/AFE */
isb
ldr pc, =1f /* Convert to VA */
1:
mcr p15, 0, r8, c2, c0, 0 /* Go to the base address saved in C2: Jump to the page table */
isb
mov r12, #0
mcr p15, 0, r12, c8, c7, 0
isb
sub lr, r11 /* adjust lr with delta of physical address and virtual address */
bx lr
.code 32
.global reset_platform
.type reset_platform,function
reset_platform:
#ifdef A7SEM_HAL_ROM_MONITOR
/* initialize CPSR (machine state register) */
mov r0, #(CPSR_IRQ_DISABLE|CPSR_FIQ_DISABLE|CPSR_SVC_MODE)
msr cpsr, r0
b warm_reset
#else
mov r0, #0
mov pc, r0 // Jump to reset vector
#endif
cpu_start:
bl secondary_cpu_start
b .
/*
* set sp for current cpu
* r1 is stack bottom, r0 is stack size, r11 hold cpu id
*/
sp_set:
mul r3, r0, r11
sub r2, r1, r3
mov sp, r2
bx lr /* set sp */
/*
* r4: page table base address
* r5 and r6 will be used as variable
*/
page_table_clear:
mov r5, #0
mov r6, #0
0:
str r5, [r4, r6, lsl #2]
add r6, #1
cmp r6, #0x1000 /* r6 < 4096 */
blt 0b
bx lr
/*
* r4: page table base address
* r6: physical address
* r7: virtual address
* r8: sizes
* r10: flags
* r9 and r12 will be used as variable
*/
page_table_build:
mov r9, r6
bfc r9, #20, #12 /* r9: pa % MB */
add r8, r8, r9
add r8, r8, #(1 << 20)
sub r8, r8, #1
lsr r6, #20 /* r6 = physical address / MB */
lsr r7, #20 /* r7 = virtual address / MB */
lsr r8, #20 /* r8 = roundup(size, MB) */
page_table_build_loop:
orr r12, r10, r6, lsl #20 /* r12: flags | physAddr */
str r12, [r4, r7, lsl #2] /* gPgTable[l1Index] = physAddr | flags */
add r6, #1 /* physAddr+ */
add r7, #1 /* l1Index++ */
subs r8, #1 /* sizes-- */
bne page_table_build_loop
bx lr
/*
* init stack to initial value
* r0 is stack mem start, r1 is stack mem end
*/
stack_init:
ldr r2, =OS_STACK_INIT
ldr r3, =OS_STACK_INIT
/* Main loop sets 32 bytes at a time. */
stack_init_loop:
.irp offset, #0, #8, #16, #24
strd r2, r3, [r0, \offset]
.endr
add r0, #32
cmp r0, r1
blt stack_init_loop
bx lr
pa_va_offset:
.word .
/*
* set magic num to stack top for all cpu
* r0 is stack top, r1 is stack size, r2 is magic num
*/
excstack_magic:
mov r3, #0
excstack_magic_loop:
str r2, [r0]
add r0, r0, r1
add r3, r3, #1
cmp r3, #CORE_NUM
blt excstack_magic_loop
bx lr
/*
* 0xe51ff004 = "ldr pc, [pc, #-4]"
* next addr value will be the real booting addr
*/
_bootaddr_setup:
mov r0, #0
ldr r1, =0xe51ff004
str r1, [r0]
add r0, r0, #4
ldr r1, =SYS_MEM_BASE
str r1, [r0]
dsb
isb
bx lr
init_done:
.long 0xDEADB00B
.code 32
.data
init_flag:
.balign 4
.long 0
/*
* Temporary interrupt stack
*/
.section ".int_stack", "wa", %nobits
.align 3
__undef_stack:
.space OS_EXC_UNDEF_STACK_SIZE * CORE_NUM
__undef_stack_top:
__abt_stack:
.space OS_EXC_ABT_STACK_SIZE * CORE_NUM
__abt_stack_top:
__irq_stack:
.space OS_EXC_IRQ_STACK_SIZE * CORE_NUM
__irq_stack_top:
__fiq_stack:
.space OS_EXC_FIQ_STACK_SIZE * CORE_NUM
__fiq_stack_top:
__svc_stack:
.space OS_EXC_SVC_STACK_SIZE * CORE_NUM
__svc_stack_top:
__exc_stack:
.space OS_EXC_STACK_SIZE * CORE_NUM
__exc_stack_top:
具体内容自行阅读
这里有两个启动代码内容看起来也有点像，不太清楚区别，可以一个是单核启动一个是多核启动。
之前研究exynos4412的时候发现cpu0内就有控制其它三个核心的寄存器。所以启动时是cpu0先启动再去选择是不是引导其它内核启动。不清楚别的处理器是不是也是这样设计的。
下面是对上面代码的简单解析。
3.3 main函数分析
/*
* Copyright (c) 2013-2019, Huawei Technologies Co., Ltd. All rights reserved.
* Copyright (c) 2020, Huawei Device Co., Ltd. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice, this list of
* conditions and the following disclaimer.
*
* 2. Redistributions in binary form must reproduce the above copyright notice, this list
* of conditions and the following disclaimer in the documentation and/or other materials
* provided with the distribution.
*
* 3. Neither the name of the copyright holder nor the names of its contributors may be used
* to endorse or promote products derived from this software without specific prior written
* permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR
* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
* ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#include "los_config.h"
#include "los_task_pri.h"
#include "los_swtmr_pri.h"
#include "los_printf.h"
#include "los_atomic.h"
#include "gic_common.h"
#include "uart.h"
#include "los_process_pri.h"
#include "los_arch_mmu.h"
#if (LOSCFG_KERNEL_SMP == YES)
STATIC Atomic g_ncpu = 1;
#endif
LITE_OS_SEC_TEXT_INIT VOID OsSystemInfo(VOID)
{
#ifdef LOSCFG_DEBUG_VERSION
const CHAR *buildType = "debug";
#else
const CHAR *buildType = "release";
#endif /* LOSCFG_DEBUG_VERSION */
PRINT_RELEASE("\n******************Welcome******************\n\n"
"Processor : %s"
#if (LOSCFG_KERNEL_SMP == YES)
" * %d\n"
"Run Mode : SMP\n"
#else
"\n"
"Run Mode : UP\n"
#endif
"GIC Rev : %s\n"
"build time : %s %s\n"
"Kernel : %s %d.%d.%d.%d/%s\n"
"\n*******************************************\n",
LOS_CpuInfo(),
#if (LOSCFG_KERNEL_SMP == YES)
LOSCFG_KERNEL_SMP_CORE_NUM,
#endif
HalIrqVersion(), __DATE__, __TIME__,\
KERNEL_NAME, KERNEL_MAJOR, KERNEL_MINOR, KERNEL_PATCH, KERNEL_ITRE, buildType);
}
LITE_OS_SEC_TEXT_INIT VOID secondary_cpu_start(VOID)
{
#if (LOSCFG_KERNEL_SMP == YES)
UINT32 cpuid = ArchCurrCpuid();
OsArchMmuInitPerCPU();
OsCurrTaskSet(OsGetMainTask());
/* increase cpu counter */
LOS_AtomicInc(&g_ncpu);
/* store each core's hwid */
CPU_MAP_SET(cpuid, OsHwIDGet());
HalIrqInitPercpu();
OsCurrProcessSet(OS_PCB_FROM_PID(OsGetKernelInitProcessID()));
OsSwtmrInit();
OsIdleTaskCreate();
OsStart();
while (1) {
__asm volatile("wfi");
}
#endif
}
#if (LOSCFG_KERNEL_SMP == YES)
#ifdef LOSCFG_TEE_ENABLE
#define TSP_CPU_ON 0xb2000011UL
STATIC INT32 raw_smc_send(UINT32 cmd)
{
register UINT32 smc_id asm("r0") = cmd;
do {
asm volatile (
"mov r0, %[a0]\n"
"smc #0\n"
: [a0] "+r"(smc_id)
);
} while (0);
return (INT32)smc_id;
}
STATIC VOID trigger_secondary_cpu(VOID)
{
(VOID)raw_smc_send(TSP_CPU_ON);
}
LITE_OS_SEC_TEXT_INIT VOID release_secondary_cores(VOID)
{
trigger_secondary_cpu();
/* wait until all APs are ready */
while (LOS_AtomicRead(&g_ncpu) < LOSCFG_KERNEL_CORE_NUM) {
asm volatile("wfe");
}
}
#else
#define CLEAR_RESET_REG_STATUS(regval) (regval) &= ~(1U << 2)
LITE_OS_SEC_TEXT_INIT VOID release_secondary_cores(VOID)
{
UINT32 regval;
/* clear the slave cpu reset */
READ_UINT32(regval, PERI_CRG30_BASE);
CLEAR_RESET_REG_STATUS(regval);
WRITE_UINT32(regval, PERI_CRG30_BASE);
/* wait until all APs are ready */
while (LOS_AtomicRead(&g_ncpu) < LOSCFG_KERNEL_CORE_NUM) {
asm volatile("wfe");
}
}
#endif /* LOSCFG_TEE_ENABLE */
#endif /* LOSCFG_KERNEL_SMP */
LITE_OS_SEC_TEXT_INIT INT32 main(VOID)
{
UINT32 uwRet = LOS_OK;
OsSetMainTask();
OsCurrTaskSet(OsGetMainTask());
PRINT_RELEASE("\n******************Main******************\n\n");
/* set smp system counter freq */
#if (LOSCFG_KERNEL_SMP == YES)
#ifndef LOSCFG_TEE_ENABLE
HalClockFreqWrite(OS_SYS_CLOCK);
#endif
#endif
/* system and chip info */
OsSystemInfo();
PRINT_RELEASE("\nmain core booting up...\n");
uwRet = OsMain();
if (uwRet != LOS_OK) {
return LOS_NOK;
}
#if (LOSCFG_KERNEL_SMP == YES)
PRINT_RELEASE("releasing %u secondary cores\n", LOSCFG_KERNEL_SMP_CORE_NUM - 1);
release_secondary_cores();
#endif
CPU_MAP_SET(0, OsHwIDGet());
OsStart();
while (1) {
__asm volatile("wfi");
}
}
3.4 OSmain函数分析
/*
* Copyright (c) 2013-2019, Huawei Technologies Co., Ltd. All rights reserved.
* Copyright (c) 2020, Huawei Device Co., Ltd. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice, this list of
* conditions and the following disclaimer.
*
* 2. Redistributions in binary form must reproduce the above copyright notice, this list
* of conditions and the following disclaimer in the documentation and/or other materials
* provided with the distribution.
*
* 3. Neither the name of the copyright holder nor the names of its contributors may be used
* to endorse or promote products derived from this software without specific prior written
* permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR
* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
* ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#include "los_config.h"
#include "string.h"
#include "stdio.h"
#include "los_oom.h"
#ifdef LOSCFG_COMPAT_LINUXKPI
#include "linux/workqueue.h"
#include "linux/module.h"
#endif
#include "los_sys.h"
#include "los_tick.h"
#include "los_task_pri.h"
#include "los_printf.h"
#include "los_swtmr.h"
#include "los_swtmr_pri.h"
#include "los_timeslice_pri.h"
#include "los_memory_pri.h"
#include "los_sem_pri.h"
#include "los_mux_pri.h"
#include "los_queue_pri.h"
#include "los_memstat_pri.h"
#include "los_hwi_pri.h"
#include "los_spinlock.h"
#include "los_mp.h"
#include "los_atomic.h"
#include "los_exc_pri.h"
#include "gic_common.h"
#include "los_vm_boot.h"
#ifdef LOSCFG_FS_VFS
#include "fs/fs.h"
#include "fs/fs_operation.h"
#endif
#if (LOSCFG_KERNEL_TRACE == YES)
#include "los_trace.h"
#endif
#ifdef LOSCFG_KERNEL_CPUP
#include "los_cpup_pri.h"
#endif
#ifdef LOSCFG_COMPAT_POSIX
#include "pprivate.h"
#endif
#ifdef LOSCFG_DRIVERS_HDF_PLATFORM_UART
#include "console.h"
#endif
#ifdef LOSCFG_KERNEL_TICKLESS
#include "los_tickless.h"
#endif
#ifdef LOSCFG_ARCH_CORTEX_M7
#include "los_exc_pri.h"
#endif
#ifdef LOSCFG_MEM_RECORDINFO
#include "los_memrecord_pri.h"
#endif
#include "los_hw_tick_pri.h"
#include "los_hwi_pri.h"
#if defined(LOSCFG_HW_RANDOM_ENABLE) || defined (LOSCFG_DRIVERS_RANDOM)
#include "randomdev.h"
#include "yarrow.h"
#endif
#ifdef LOSCFG_SHELL_DMESG
#include "dmesg_pri.h"
#endif
#ifdef LOSCFG_SHELL_LK
#include "shell_pri.h"
#endif
#ifdef LOSCFG_KERNEL_PIPE
#include "pipe_common.h"
#endif
#include "los_process_pri.h"
#include "los_futex_pri.h"
#ifdef LOSCFG_KERNEL_VDSO
#include "los_vdso.h"
#endif
#if (LOSCFG_KERNEL_LITEIPC == YES)
#include "hm_liteipc.h"
#endif
#ifdef LOSCFG_DRIVERS_HIEVENT
#include "hievent_driver.h"
#endif
#if (LOSCFG_BASE_CORE_HILOG == YES)
#include "los_hilog.h"
#endif
#ifdef __cplusplus
#if __cplusplus
extern "C" {
#endif /* __cplusplus */
#endif /* __cplusplus */
extern UINT32 OsSystemInit(VOID);
extern VOID SystemInit(VOID);
LITE_OS_SEC_TEXT_INIT VOID osRegister(VOID)
{
g_sysClock = OS_SYS_CLOCK;
g_tickPerSecond = LOSCFG_BASE_CORE_TICK_PER_SECOND;
return;
}
LITE_OS_SEC_TEXT_INIT VOID OsStart(VOID)
{
LosProcessCB *runProcess = NULL;
LosTaskCB *taskCB = NULL;
UINT32 cpuid = ArchCurrCpuid();
OsTickStart();
LOS_SpinLock(&g_taskSpin);
taskCB = OsGetTopTask();
runProcess = OS_PCB_FROM_PID(taskCB->processID);
runProcess->processStatus |= OS_PROCESS_STATUS_RUNNING;
#if (LOSCFG_KERNEL_SMP == YES)
/*
* attention: current cpu needs to be set, in case first task deletion
* may fail because this flag mismatch with the real current cpu.
*/
taskCB->currCpu = cpuid;
runProcess->processStatus = OS_PROCESS_RUNTASK_COUNT_ADD(runProcess->processStatus);
#endif
OS_SCHEDULER_SET(cpuid);
PRINTK("cpu %d entering scheduler\n", cpuid);
OsStartToRun(taskCB);
}
LITE_OS_SEC_TEXT_INIT STATIC UINT32 OsIpcInit(VOID)
{
UINT32 ret;
#if (LOSCFG_BASE_IPC_SEM == YES)
ret = OsSemInit();
if (ret != LOS_OK) {
return ret;
}
#endif
#if (LOSCFG_BASE_IPC_QUEUE == YES)
ret = OsQueueInit();
if (ret != LOS_OK) {
return ret;
}
#endif
return LOS_OK;
}
#ifdef LOSCFG_KERNEL_PIPE
LITE_OS_SEC_TEXT_INIT STATIC VOID OsDriverPipeInit(VOID)
{
(VOID)pipe_init();
}
#endif
#ifdef LOSCFG_DRIVERS_HIEVENT
LITE_OS_SEC_TEXT_INIT STATIC VOID OsDriverHiEventInit(VOID)
{
(VOID)HieventInit();
}
#endif
#ifdef LOSCFG_COMPAT_BSD
extern void configure (void);
LITE_OS_SEC_TEXT_INIT STATIC INT32 OsBsdInit(VOID)
{
configure();
mi_startup(SI_SUB_ARCH_INIT);
return LOS_OK;
}
#endif
LITE_OS_SEC_TEXT_INIT INT32 OsMain(VOID)
{
UINT32 ret;
osRegister();
#ifdef LOSCFG_SHELL_DMESG
ret = OsDmesgInit();
if (ret != LOS_OK) {
return ret;
}
#endif
#ifdef LOSCFG_SHELL_LK
OsLkLoggerInit(NULL);
#endif
#ifdef LOSCFG_EXC_INTERACTION
#ifdef LOSCFG_ARCH_CORTEX_M7
/* 4096: 4K space for Stack */
ret = OsMemExcInteractionInit((UINT32)&__bss_end + 4096);
#else
ret = OsMemExcInteractionInit((UINTPTR)&__bss_end);
#endif
if (ret != LOS_OK) {
return ret;
}
#endif
#if (LOSCFG_PLATFORM_HWI == YES)
OsHwiInit();
#endif
OsExcInit();
ret = OsTickInit(g_sysClock, LOSCFG_BASE_CORE_TICK_PER_SECOND);
if (ret != LOS_OK) {
return ret;
}
#ifdef LOSCFG_PLATFORM_UART_WITHOUT_VFS
#ifdef LOSCFG_DRIVERS
extern void uart_init(void);
uart_init();
#endif
#ifdef LOSCFG_SHELL
#endif //LOSCFG_SHELL
#endif //LOSCFG_PLATFORM_UART_WITHOUT_VFS
ret = OsTaskInit();
if (ret != LOS_OK) {
PRINT_ERR("OsTaskInit error\n");
return ret;
}
#if ((LOSCFG_BASE_IPC_QUEUE == YES) || (LOSCFG_BASE_IPC_MUX == YES) || (LOSCFG_BASE_IPC_SEM == YES))
ret = OsIpcInit();
if (ret != LOS_OK) {
return ret;
}
#endif
ret = OsSysMemInit();
if (ret != LOS_OK) {
PRINT_ERR("OsSysMemInit error\n");
return ret;
}
SyscallHandleInit();
/*
* CPUP should be inited before first task creation which depends on the semaphore
* when LOSCFG_KERNEL_SMP_TASK_SYNC is enabled. So don't change this init sequence
* if not neccessary. The sequence should be like this:
* 1. OsIpcInit
* 2. OsCpupInit
* 3. other inits have task creation
*/
#ifdef LOSCFG_KERNEL_CPUP
ret = OsCpupInit();
if (ret != LOS_OK) {
PRINT_ERR("OsCpupInit error\n");
return ret;
}
#endif
ret = OsKernelInitProcess();
if (ret != LOS_OK) {
return ret;
}
#if (LOSCFG_BASE_CORE_SWTMR == YES)
ret = OsSwtmrInit();
if (ret != LOS_OK) {
return ret;
}
#endif
#ifdef LOSCFG_KERNEL_CPUP
OsCpupGuardCreator();
#endif
#if (LOSCFG_KERNEL_SMP == YES)
(VOID)OsMpInit();
#endif
#if defined(LOSCFG_HW_RANDOM_ENABLE) || defined (LOSCFG_DRIVERS_RANDOM)
random_alg_context.ra_init_alg(NULL);
run_harvester_iterate(NULL);
#endif
#ifdef LOSCFG_COMPAT_BSD
ret = OsBsdInit();
if (ret != LOS_OK) {
PRINT_ERR("init bsd failed!\n");
return ret;
}
#endif
#ifdef LOSCFG_KERNEL_PIPE
OsDriverPipeInit();
#endif
ret = OsSystemInit();
if (ret != LOS_OK) {
return ret;
}
#if LOSCFG_DRIVERS_HIEVENT
OsDriverHiEventInit();
#endif
#if (LOSCFG_KERNEL_TRACE == YES)
LOS_TraceInit();
#endif
#if (LOSCFG_KERNEL_LITEIPC == YES)
ret = LiteIpcInit();
if (ret != LOS_OK) {
return ret;
}
#endif
#if (LOSCFG_BASE_CORE_HILOG == YES)
ret = HiLogDriverInit();
if (ret != LOS_OK) {
return ret;
}
#endif
#ifdef LOSCFG_KERNEL_VDSO
ret = OsInitVdso();
if (ret != LOS_OK) {
return ret;
}
#endif
ret = OsFutexInit();
if (ret != LOS_OK) {
PRINT_ERR("Create futex failed : %d!\n", ret);
return ret;
}
ret = OomTaskInit();
if (ret != LOS_OK) {
return ret;
}
return LOS_OK;
}
STATIC UINT32 OsSystemInitTaskCreate(VOID)
{
UINT32 taskID;
TSK_INIT_PARAM_S sysTask;
(VOID)memset_s(&sysTask, sizeof(TSK_INIT_PARAM_S), 0, sizeof(TSK_INIT_PARAM_S));
sysTask.pfnTaskEntry = (TSK_ENTRY_FUNC)SystemInit;
sysTask.uwStackSize = LOSCFG_BASE_CORE_TSK_DEFAULT_STACK_SIZE;
sysTask.pcName = "SystemInit";
sysTask.usTaskPrio = LOSCFG_BASE_CORE_TSK_DEFAULT_PRIO;
sysTask.uwResved = LOS_TASK_STATUS_DETACHED;
#if (LOSCFG_KERNEL_SMP == YES)
sysTask.usCpuAffiMask = CPUID_TO_AFFI_MASK(ArchCurrCpuid());
#endif
return LOS_TaskCreate(&taskID, &sysTask);
}
#ifdef LOSCFG_MEM_RECORDINFO
STATIC UINT32 OsMemShowTaskCreate(VOID)
{
UINT32 taskID;
TSK_INIT_PARAM_S appTask;
(VOID)memset_s(&appTask, sizeof(TSK_INIT_PARAM_S), 0, sizeof(TSK_INIT_PARAM_S));
appTask.pfnTaskEntry = (TSK_ENTRY_FUNC)OsMemRecordShowTask;
appTask.uwStackSize = LOSCFG_BASE_CORE_TSK_DEFAULT_STACK_SIZE;
appTask.pcName = "memshow_Task";
appTask.usTaskPrio = LOSCFG_BASE_CORE_TSK_DEFAULT_PRIO;
appTask.uwResved = LOS_TASK_STATUS_DETACHED;
return LOS_TaskCreate(&taskID, &appTask);
}
#endif
UINT32 OsSystemInit(VOID)
{
UINT32 ret;
#ifdef LOSCFG_FS_VFS
los_vfs_init();
#endif
#ifdef LOSCFG_COMPAT_LINUXKPI
g_pstSystemWq = create_workqueue("system_wq");
#endif
ret = OsSystemInitTaskCreate();
if (ret != LOS_OK) {
return ret;
}
#ifdef LOSCFG_MEM_RECORDINFO
ret = OsMemShowTaskCreate();
if (ret != LOS_OK) {
PRINTK("create memshow_Task error %u\n", ret);
return ret;
}
PRINTK("create memshow_Task ok\n");
#endif
#ifdef LOSCFG_KERNEL_TICKLESS
LOS_TicklessEnable();
#endif
return 0;
}
#ifdef __cplusplus
#if __cplusplus
}
#endif /* __cplusplus */
#endif /* __cplusplus */
3.5 SystemInit函数分析
这个函数做的比较重要
他在平台的board文件里，因为这些也和板子相关
#include "los_base.h"
#include "los_config.h"
#include "los_process_pri.h"
#include "lwip/init.h"
#include "lwip/tcpip.h"
#include "sys/mount.h"
#include "mtd_partition.h"
#include "console.h"
UINT32 OsRandomStackGuard(VOID)
{
return 0;
}
static void imx6ull_mount_rootfs()
{
#if 0
#if 1
dprintf("register parition ...\n");
if (add_mtd_partition("spinor", 0, 0x4000000, 0))
{
PRINT_ERR("add_mtd_partition fail\n");
}
dprintf("mount /dev/spinorblk0 / ...\n");
//if (mount("/dev/spinorblk0", "/", "jffs2", MS_RDONLY, NULL))
if (mount("/dev/spinorblk0", "/", "jffs2", 0, NULL))
{
PRINT_ERR("mount failed\n");
}
#else
dprintf("mount /dev/ramdisk / ...\n");
//if (mount("/dev/spinorblk0", "/", "jffs2", MS_RDONLY, NULL))
if (mount("/dev/ramdisk", "/", "vfat", 0, NULL))
{
PRINT_ERR("mount failed\n");
}
#endif
#endif
}
static void imx6ull_driver_init()
{
#if 0
extern int my_ramdisk_init(void);
if (my_ramdisk_init())
{
PRINT_ERR("my_ramdisk_init failed\n");
}
#else
extern int spinor_init(void);
dprintf("spinor_init init ...\n");
if (!spinor_init())
{
PRINT_ERR("spinor_init failed\n");
}
#endif
#ifdef LOSCFG_DRIVERS_VIDEO
dprintf("imx6ull_fb_init init ...\n");
extern int imx6ull_fb_init(void);
if (imx6ull_fb_init())
{
PRINT_ERR("imx6ull_fb_init failed\n");
}
#endif
}
void SystemInit()
{
#ifdef LOSCFG_FS_PROC
dprintf("proc fs init ...\n");
extern void ProcFsInit(void);
ProcFsInit();
#endif
#ifdef LOSCFG_DRIVERS_MEM
dprintf("mem dev init ...\n");
extern int mem_dev_register(void);
mem_dev_register();
#endif
imx6ull_driver_init();
imx6ull_mount_rootfs();
#ifdef LOSCFG_DRIVERS_HDF
extern int DeviceManagerStart(void);
PRINT_RELEASE("DeviceManagerStart start ...\n");
if (DeviceManagerStart()) {
PRINT_ERR("No drivers need load by hdf manager!");
}
dprintf("DeviceManagerStart end ...\n");
#endif
extern int uart_dev_init(void);
uart_dev_init();
if (virtual_serial_init("/dev/uartdev-0") != 0)
{
PRINT_ERR("virtual_serial_init failed");
}
if (system_console_init(SERIAL) != 0)
{
PRINT_ERR("system_console_init failed\n");
}
if (OsUserInitProcess())
{
PRINT_ERR("Create user init process faialed!\n");
}
}
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