一、实验名称
1.译码器的门级建模
二、实验步骤
1.在quartus ii中新建文件夹保存代码代码在Modesim进行联合仿真
三、实验代码
module DEC2x4(Z,A,B, Enable );
output [3:0] z ;
input A,B, Enable; wire Abar,Bbar;
not
not0 (Abar, A),
not1 (Bbar, B);
nand
nand0 ( z[3], Enable,A, B),
nand1 ( z[0], Enable,Abar,Bbar),
nand2 (z[1], Enable,Abar,B),
nand3 (z[2], Enable,A,Bbar);
endmodule
module tb_22;
reg a,b,e;
wire [3:0] z;
initial
begin
a=0;b=0;e=0;
#10 a=0;b=0;e=1;
#10 a=0;b=1;
#10 a=1;b=0;
#10 a=1;b=1;
#10 a=1’bx;b=1’bx;
#10 $stop;
end
DEC2x4 my_dec2x4 (z,a,b,e);
endmodule