20200517-paperResearch about the implementation of RRAM crossbar based in-situ training

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title: 20200517_paperResearch about the implementation of in-situ training
date: 2020-05-17 23:37:10
tags: RRAMAlgorithm
categories:

• paperResearch

---

As far as I know, the training approaches of RRAM crossbar based NN are divided into two types. One of them is called ex-situ, or off line training. This method is very simple. You just need train the NN by software and acquire the weight matrix and then map them into RRAM crossbar array. The cons and pros of ex-situ are obviously. About the cons, this way can not eliminate the negative influence of non-ideal factors for devices and array, like variation, stuck-at-fault, non-linear and line resistance. Therefore, the accuracy of RRAM crossbar based NN system will have a loss. And the pros are that it’s unnecessary to add external circuit. As a result, the energy efficiency will be improved, while the area of chip will drop. The other training approach is called in-situ, or online training. This method is several more complicated than ex-situ and I still don’t find out the whole process of it. However, I have read some related papers and understand more about it. The pros and cons of in-situ training approach are opposite to the ex-situ one and I will not say these stuff again.

OK, the next section I will share some papers that I read in the last few days. Of course, the following viewpoints come from my understandings about these papers and I will give all the references.

You know, I just want to figure out how the in-situ training work on RRAM array. [1] is a paper about architecture. It proposes their own data flow but not the details of in-situ training. The following figure is the main idea of this paper.

It’s obviously that I don’t get the answer I want in this paper. Luckily, I found the conference paper from IPFA 2019 written by Yuyi Liu [2].To be honest, I didn’t read this paper carefully. However, this reference mentions that Manhattan rule is used in the process of in-situ training. Therefore, I began to search

the key word, Manhattan rule, and wanted to find out something. Quickly, I found several papers which mentioned the in-situ training in detail.

[3] proposes the combination of “dropout” and **“Manhattan Rule” **training algorithms for memristive crossbar NN to reduce circuit area overhead of in-situ training.

The Fig.1.a above shows what the dropout is. I believe that it’s a conception from Computer Science and they find through this trick the additional circuit overhead for in-situ training will just drop. The idea is very easy to understand logically. The dropout of some neurons will decrease the number of weights that are needed to update.

Also, the Manhattan rule is shown in the following equation.

It’s a very crude version of BP because it just considers the sign of delta W, which is also the reason why it can decrease the complexity of additional circuit. However, this paper is just a application of Manhattan rule and I want original paper.

Fortunately, I find this paper finally [4]. The following Fig shows that applied voltage pulses on word line and bit line varying with the sign of delta W.

The most important is not the Fig above but the following paragraph. It gives detailed implementation of several key computations. The δ by W computation can be easily performed using the same crossbar array but with reverse direction of computation.

[5] is earlier than [4] and it propose a more general training algorithm than Manhattan Rule. The amplitude of applied voltage pulses will varying with error rather than just the sign of error. As a result, the additional circuit overhead is bigger than [4]‘s.

In this time, I understand the hybrid training proposed by Peng Yao’s paper in Nature 2020 [6].

**

reference

**

[1] L. Song, X. Qian, H. Li and Y. Chen, “PipeLayer: A Pipelined ReRAM-Based Accelerator for Deep Learning,” 2017 IEEE International Symposium on High Performance Computer Architecture (HPCA), Austin, TX, 2017, pp. 541-552, doi: 10.1109/HPCA.2017.55.

[2] Y. Liu, B. Gao, M. Zhao, H. Wu and H. Qian, “The Impact of Endurance Degradation in Analog RRAM for In-Situ Training,” 2019 IEEE 26th International Symposium on Physical and Failure Analysis of Integrated Circuits (IPFA), Hangzhou, China, 2019, pp. 1-3, doi: 10.1109/IPFA47161.2019.8984759.

[3] E. Zamanidoost, M. Klachko, D. Strukov and I. Kataeva, “Low area overhead in-situ training approach for memristor-based classifier,” Proceedings of the 2015 IEEE/ACM International Symposium on Nanoscale Architectures (NANOARCH´15), Boston, MA, 2015, pp. 139-142, doi: 10.1109/NANOARCH.2015.7180601.

[4] E. Zamanidoost, F. M. Bayat, D. Strukov and I. Kataeva, “Manhattan rule training for memristive crossbar circuit pattern classifiers,” 2015 IEEE 9th International Symposium on Intelligent Signal Processing (WISP) Proceedings, Siena, 2015, pp. 1-6, doi: 10.1109/WISP.2015.7139171.

[5] I. Kataeva, F. Merrikh-Bayat, E. Zamanidoost and D. Strukov, “Efficient training algorithms for neural networks based on memristive crossbar circuits,” 2015 International Joint Conference on Neural Networks (IJCNN), Killarney, 2015, pp. 1-8, doi: 10.1109/IJCNN.2015.7280785.

[6] Yao P, Wu H, Gao B, et al. Fully hardware-implemented memristor convolutional neural network[J]. Nature, 2020, 577(7792): 641-646.

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