【DSP】TMS320F28335的SCI模块

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一、功能说明

  • 两线式异步串行通讯
  • 深度为16的FIFO
  • 接收中断检测
  • 校验位、错误帧
  • 16位可编程波特率

软件设置流程

//1.SCI时钟使能,在InitSysCtrl()函数里
SysCtrlRegs.PCLKCR0.bit.SCIAENCLK = 1;   // SCI-A
SysCtrlRegs.PCLKCR0.bit.SCIBENCLK = 1;   // SCI-B
SysCtrlRegs.PCLKCR0.bit.SCICENCLK = 1;   // SCI-C
//2.引脚初始化
InitSciaGpio();   // SCI-A
InitScibGpio();   // SCI-B
InitScicGpio();   // SCI-C
//3.协议初始化
//4.功能初始化
//5.FIFO初始化
//6.重新使能SCI

二、协议

在这里插入图片描述
在这里插入图片描述

//3.协议初始化
	ScibRegs.SCICCR.bit.STOPBITS = 0;//0-One stop bit; 1-Two stop bits
	ScibRegs.SCICCR.bit.PARITY = 0;//0-Odd parity; 1-Even parity
	ScibRegs.SCICCR.bit.PARITYENA = 0;//0-Parity disable; 1-Parity enable
	ScibRegs.SCICCR.bit.LOOPBKENA = 0;//0-loopback disable; 1-loopback enable
	ScibRegs.SCICCR.bit.ADDRIDLE_MODE = 0;//0-idle-line; 1-address-bit
	ScibRegs.SCICCR.bit.SCICHAR = 0x7;//character length = 8
	ScibRegs.SCIHBAUD = 0x0001;// 9600 baud @LSPCLK = 37.5MHz.
	ScibRegs.SCILBAUD = 0x00E7;

三、模式说明

3.1 查询+禁用FIFO式

//3.协议初始化
//4.功能初始化
ScibRegs.SCICTL1.bit.RXERRINTENA = 0;//禁用接收错误中断
ScibRegs.SCICTL1.bit.SWRESET = 1;//复位SCI和状态寄存器
ScibRegs.SCICTL1.bit.TXWAKE = 0;//禁用TXWAKE功能
ScibRegs.SCICTL1.bit.SLEEP = 0;//禁用SLEEP功能
ScibRegs.SCICTL1.bit.TXENA = 1;//发送使能
ScibRegs.SCICTL1.bit.RXENA = 1;//接收使能
ScibRegs.SCICTL2.bit.RXBKINTENA = 0;//禁用接收中断
ScibRegs.SCICTL2.bit.TXINTENA = 0;//禁用发送中断
//5.FIFO初始化
ScibRegs.SCIFFTX.bit.SCIRST = 0;//复位SCI发送接收通道
ScibRegs.SCIFFTX.bit.SCIFFENA = 0;//禁用FIFO
ScibRegs.SCIFFTX.bit.TXFIFOXRESET = 0;//持续复位发送FIFO
ScibRegs.SCIFFTX.bit.TXFFINTCLR = 1;//清除发送FIFO中断标志位
ScibRegs.SCIFFTX.bit.TXFFIENA = 0;//禁用发送FIFO中断
ScibRegs.SCIFFTX.bit.TXFFIL = 0;//发送FIFO深度设为0
ScibRegs.SCIFFRX.bit.RXFFOVRCLR = 1;//清除接收FIFO溢出标志位
ScibRegs.SCIFFRX.bit.RXFIFORESET = 0;//持续复位接收FIFO
ScibRegs.SCIFFRX.bit.RXFFINTCLR = 1;//清除接收FIFO中断标志位
ScibRegs.SCIFFRX.bit.RXFFIENA = 0;//禁用接收FIFO中断
ScibRegs.SCIFFRX.bit.RXFFIL = 0;//接收FIFO深度设为0
ScibRegs.SCIFFCT.bit.ABD = 0;//禁用自动波特率检测功能
ScibRegs.SCIFFCT.bit.ABDCLR = 1;//清除ABD标志位
ScibRegs.SCIFFCT.bit.CDC = 0;//禁用ABD对齐
ScibRegs.SCIFFCT.bit.FFTXDLY = 0;//FIFO延时为0个波特率时钟周期
//6.重新使能SCI
ScibRegs.SCIFFTX.bit.SCIRST = 1;//使能SCI的发送和接收通道
ScibRegs.SCICTL1.bit.SWRESET = 1;//重新使能SCI
//发送数据
while (ScibRegs.SCICTL2.bit.TXRDY != 1) { }//等待发送缓存清空
ScibRegs.SCITXBUF = SendChar;
//接收数据
while(ScibRegs.SCIRXST.bit.RXRDY !=1) { }//等待接收缓存就绪
ReceivedChar = ScibRegs.SCIRXBUF.all;

3.2 中断+禁用FIFO式

//3.协议初始化
//4.功能初始化
ScibRegs.SCICTL1.bit.RXERRINTENA = 0;//禁用接收错误中断
ScibRegs.SCICTL1.bit.SWRESET = 1;//复位SCI和状态寄存器
ScibRegs.SCICTL1.bit.TXWAKE = 0;//禁用TXWAKE功能
ScibRegs.SCICTL1.bit.SLEEP = 0;//禁用SLEEP功能
ScibRegs.SCICTL1.bit.TXENA = 1;//发送使能
ScibRegs.SCICTL1.bit.RXENA = 1;//接收使能
ScibRegs.SCICTL2.bit.RXBKINTENA = 1;//开启接收中断
ScibRegs.SCICTL2.bit.TXINTENA = 1;//开启发送中断
//5.FIFO初始化
ScibRegs.SCIFFTX.bit.SCIRST = 0;//复位SCI发送接收通道
ScibRegs.SCIFFTX.bit.SCIFFENA = 0;//禁用FIFO
ScibRegs.SCIFFTX.bit.TXFIFOXRESET = 0;//持续复位发送FIFO
ScibRegs.SCIFFTX.bit.TXFFINTCLR = 1;//清除发送FIFO中断标志位
ScibRegs.SCIFFTX.bit.TXFFIENA = 0;//禁用发送FIFO中断
ScibRegs.SCIFFTX.bit.TXFFIL = 0;//发送FIFO深度设为0
ScibRegs.SCIFFRX.bit.RXFFOVRCLR = 1;//清除接收FIFO溢出标志位
ScibRegs.SCIFFRX.bit.RXFIFORESET = 0;//持续复位接收FIFO
ScibRegs.SCIFFRX.bit.RXFFINTCLR = 1;//清除接收FIFO中断标志位
ScibRegs.SCIFFRX.bit.RXFFIENA = 0;//禁用接收FIFO中断
ScibRegs.SCIFFRX.bit.RXFFIL = 0;//接收FIFO深度设为0
ScibRegs.SCIFFCT.bit.ABD = 0;//禁用自动波特率检测功能
ScibRegs.SCIFFCT.bit.ABDCLR = 1;//清除ABD标志位
ScibRegs.SCIFFCT.bit.CDC = 0;//禁用ABD对齐
ScibRegs.SCIFFCT.bit.FFTXDLY = 0;//FIFO延时为0个波特率时钟周期
//6.重新使能SCI
ScibRegs.SCIFFTX.bit.SCIRST = 1;//使能SCI的发送和接收通道
ScibRegs.SCICTL1.bit.SWRESET = 1;//重新使能SCI
//7.发送一个数据,使能发送中断
ScibRegs.SCITXBUF = 0x00;发送数据
interrupt void SCIbTX_ISR(void)
{
 	ScibRegs.SCITXBUF = SendChar;发送数据
 	
	ScibRegs.SCIFFTX.bit.TXFFINTCLR = 1;  // Clear Interrupt flag
	PieCtrlRegs.PIEACK.all |= PIEACK_GROUP9;      // Issue PIE ACK
}
interrupt void SCIbRX_ISR(void)
{
	ReceiveChar = ScibRegs.SCIRXBUF.all;//接收数据
	
	ScibRegs.SCIFFRX.bit.RXFFOVRCLR = 1;  // Clear Overflow flag
	ScibRegs.SCIFFRX.bit.RXFFINTCLR = 1; 	// Clear Interrupt flag
	PieCtrlRegs.PIEACK.all |= PIEACK_GROUP9;  	// Issue PIE ack
}

3.3 查询+FIFO式

//3.协议初始化
//4.功能初始化
ScibRegs.SCICTL1.bit.RXERRINTENA = 0;//禁用接收错误中断
ScibRegs.SCICTL1.bit.SWRESET = 1;//复位SCI和状态寄存器
ScibRegs.SCICTL1.bit.TXWAKE = 0;//禁用TXWAKE功能
ScibRegs.SCICTL1.bit.SLEEP = 0;//禁用SLEEP功能
ScibRegs.SCICTL1.bit.TXENA = 1;//发送使能
ScibRegs.SCICTL1.bit.RXENA = 1;//接收使能
ScibRegs.SCICTL2.bit.RXBKINTENA = 0;//禁用接收中断
ScibRegs.SCICTL2.bit.TXINTENA = 0;//禁用发送中断
//5.FIFO初始化
ScibRegs.SCIFFTX.bit.SCIRST = 0;//复位SCI发送接收通道
ScibRegs.SCIFFTX.bit.SCIFFENA = 1;//启用FIFO
ScibRegs.SCIFFTX.bit.TXFIFOXRESET = 1;//重新使能发送FIFO
ScibRegs.SCIFFTX.bit.TXFFINTCLR = 1;//清除发送FIFO中断标志位
ScibRegs.SCIFFTX.bit.TXFFIENA = 0;//禁用发送FIFO中断
ScibRegs.SCIFFTX.bit.TXFFIL = 15;//发送FIFO深度设为15(最大值15)
ScibRegs.SCIFFRX.bit.RXFFOVRCLR = 1;//清除接收FIFO溢出标志位
ScibRegs.SCIFFRX.bit.RXFIFORESET = 1;//重新使能接收FIFO
ScibRegs.SCIFFRX.bit.RXFFINTCLR = 1;//清除接收FIFO中断标志位
ScibRegs.SCIFFRX.bit.RXFFIENA = 0;//禁用接收FIFO中断
ScibRegs.SCIFFRX.bit.RXFFIL = 16;//接收FIFO深度设为16(最大值16)
ScibRegs.SCIFFCT.bit.ABD = 0;//禁用自动波特率检测功能
ScibRegs.SCIFFCT.bit.ABDCLR = 1;//清除ABD标志位
ScibRegs.SCIFFCT.bit.CDC = 0;//禁用ABD对齐
ScibRegs.SCIFFCT.bit.FFTXDLY = 0;//FIFO延时为0个波特率时钟周期
//6.重新使能SCI
ScibRegs.SCIFFTX.bit.SCIRST = 1;//使能SCI的发送和接收通道
ScibRegs.SCICTL1.bit.SWRESET = 1;//重新使能SCI
//FIFO发送:逐个发送,直到FIFO满
for(i = 0; ScibRegs.SCIFFTX.bit.TXFFST < ScibRegs.SCIFFTX.bit.TXFFIL; i++)
	ScibRegs.SCITXBUF = SendChar[i];
//FIFO接收:等待FIFO满,逐个接收数据
while(ScibRegs.SCIFFRX.bit.RXFFST < ScibRegs.SCIFFRX.bit.RXFFIL) {}
for(i = 0; i < ScibRegs.SCIFFRX.bit.RXFFIL; i++)
	ReceiveChar[i] = ScibRegs.SCIRXBUF.all;

3.4 中断+FIFO式

//3.协议初始化
//4.功能初始化
ScibRegs.SCICTL1.bit.RXERRINTENA = 0;//禁用接收错误中断
ScibRegs.SCICTL1.bit.SWRESET = 1;//复位SCI和状态寄存器
ScibRegs.SCICTL1.bit.TXWAKE = 0;//禁用TXWAKE功能
ScibRegs.SCICTL1.bit.SLEEP = 0;//禁用SLEEP功能
ScibRegs.SCICTL1.bit.TXENA = 1;//发送使能
ScibRegs.SCICTL1.bit.RXENA = 1;//接收使能
ScibRegs.SCICTL2.bit.RXBKINTENA = 0;//禁用接收中断
ScibRegs.SCICTL2.bit.TXINTENA = 0;//禁用发送中断
//5.FIFO初始化
ScibRegs.SCIFFTX.bit.SCIRST = 0;//复位SCI发送接收通道
ScibRegs.SCIFFTX.bit.SCIFFENA = 1;//启用FIFO
ScibRegs.SCIFFTX.bit.TXFIFOXRESET = 1;//重新使能发送FIFO
ScibRegs.SCIFFTX.bit.TXFFINTCLR = 1;//清除发送FIFO中断标志位
ScibRegs.SCIFFTX.bit.TXFFIENA = 1;//启用发送FIFO中断
ScibRegs.SCIFFTX.bit.TXFFIL = 15;//发送FIFO深度设为15(最大值15)
ScibRegs.SCIFFRX.bit.RXFFOVRCLR = 1;//清除接收FIFO溢出标志位
ScibRegs.SCIFFRX.bit.RXFIFORESET = 1;//重新使能接收FIFO
ScibRegs.SCIFFRX.bit.RXFFINTCLR = 1;//清除接收FIFO中断标志位
ScibRegs.SCIFFRX.bit.RXFFIENA = 1;//启用接收FIFO中断
ScibRegs.SCIFFRX.bit.RXFFIL = 16;//接收FIFO深度设为16(最大值16)
ScibRegs.SCIFFCT.bit.ABD = 0;//禁用自动波特率检测功能
ScibRegs.SCIFFCT.bit.ABDCLR = 1;//清除ABD标志位
ScibRegs.SCIFFCT.bit.CDC = 0;//禁用ABD对齐
ScibRegs.SCIFFCT.bit.FFTXDLY = 0;//FIFO延时为0个波特率时钟周期
//6.重新使能SCI
ScibRegs.SCIFFTX.bit.SCIRST = 1;//使能SCI的发送和接收通道
ScibRegs.SCICTL1.bit.SWRESET = 1;//重新使能SCI

(1)连续发

interrupt void SCIbTX_ISR(void)
{
    Uint16 i;
    while(ScibRegs.SCIFFTX.bit.TXFFST != 0){}//等待发送FIFO清空
    //逐个发送数据
    for(i = 0; i <= ScibRegs.SCIFFTX.bit.TXFFIL; i++)
    	ScibRegs.SCITXBUF = SendChar[i];

	ScibRegs.SCIFFTX.bit.TXFFINTCLR = 1;// Clear Interrupt flag
	PieCtrlRegs.PIEACK.all |= PIEACK_GROUP9;// Issue PIE ACK
}

interrupt void SCIbRX_ISR(void)
{
    Uint16 i;
    //FIFO满,逐个接收数据
    for(i = 0; i < ScibRegs.SCIFFRX.bit.RXFFIL; i++)
    	ReceiveChar[i] = ScibRegs.SCIRXBUF.all;

	ScibRegs.SCIFFRX.bit.RXFFOVRCLR = 1;// Clear Overflow flag
	ScibRegs.SCIFFRX.bit.RXFFINTCLR = 1;// Clear Interrupt flag
	PieCtrlRegs.PIEACK.all |= PIEACK_GROUP9;// Issue PIE ack
}

(2)一收一发

interrupt void SCIbTX_ISR(void)
{
    Uint16 i;
    while(ScibRegs.SCIFFTX.bit.TXFFST != 0){}//等待发送FIFO清空
    //逐个发送数据
    for(i = 0; i <= ScibRegs.SCIFFTX.bit.TXFFIL; i++)
    	ScibRegs.SCITXBUF = SendChar[i];

	PieCtrlRegs.PIEACK.all |= PIEACK_GROUP9;// Issue PIE ACK
}

interrupt void SCIbRX_ISR(void)
{
    Uint16 i;
    //FIFO满,逐个接收数据
    for(i = 0; i < ScibRegs.SCIFFRX.bit.RXFFIL; i++)
    	ReceiveChar[i] = ScibRegs.SCIRXBUF.all;

	ScibRegs.SCIFFTX.bit.TXFFINTCLR = 1;// Clear Interrupt flag
	ScibRegs.SCIFFRX.bit.RXFFOVRCLR = 1;// Clear Overflow flag
	ScibRegs.SCIFFRX.bit.RXFFINTCLR = 1;// Clear Interrupt flag
	PieCtrlRegs.PIEACK.all |= PIEACK_GROUP9;// Issue PIE ack
}
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