// 进程A#include<stdio.h>intmain(void){int a =0;int b =5;int c =0;printf("press ENTER to divide\n");getchar();
c = b/a;//执行到这一句发生 data abort 异常return0;}// divide-by-zero// divide by zero// https://blog.csdn.net/horacen/article/details/107366457// bl 0 <__aeabi_idiv>// libgcc.a 中提供了 __aeabi_idiv// gcc-4.1.2 中 提供了 /usr/lib/gcc/i686-pc-linux-gnu/4.1.2/libgcc.a
代码有没有使用vfp 取决于编译过程
-mfloat-abi=aaa 来指定浮点运算处理方式
-mfpu=bbb来指定浮点协处理的类型
aaa 可取 soft softfp hard
bbb 可取 vfp neon vfpv3 vfpv4 vfpv3-d16 vfpv4-d16
-mfloat-abi=soft // -msoft-float 与 -mfloat-abi 功能类似// 用cpu寄存器(不用vfp寄存器),将除0 在用户空间用 浮点软件库 实现// 有没有fpu都不会陷入异常// gcc 用的 软件浮点库实现 为 mpfr // The MPFR library is a C library for multiple-precision floating-point computations with correct rounding. -mfloat-abi=softfp
// 用cpu寄存器(不用vfp寄存器),用vfp指令// 有fpu,直接执行指令 没有fpu,陷入未定义指令异常,可在异常中模拟该指令-mfloat-abi=hard
// 用vfp寄存器,用vfp指令// 有fpu,直接执行指令 没有fpu,陷入未定义指令异常,可在异常中模拟该指令
vfp有没有 开启
从ARMv5开始,就有可选的 Vector Floating Point
启用的话,要按照以下步骤
1.如果在 Normal World 下需要访问 VFP ,那么必须
在 Non-Secure Access Control Register(CP15.NSACR)(即在 CP15 register1 中的 Coprocessor access register) 中必须启用对 CP10 和 CP11 的访问,这通常是在安全引导加载程序中完成的。
bit[21:20]0b11
bit[23:22]0b11
2.置位(不是清0) VFP专用系统寄存器 FPEXC 寄存器中的 bit[30](EN)
next step
下一步可能是
1.fpu指令的执行
2.浮点软件库的执行
3.未定义指令异常
在这里,根据实际情况来看, 会是 浮点软件库的执行, 浮点软件库由 gcc 提供(不是glibc)
在这里,除0 不是 arm异常 检测到的,而是 gcc提供的浮点软件库 检测到的.
float32 float32_div( float32 a, float32 b )
bExp =extractFloat32Exp( b );if( bExp ==0)float_raise( float_flag_divbyzero );--- 其他可能情况下的解释
// 浮点软件库的执行 引起的异常
A coprocessor can partially execute an instruction and then cause an exception.
This is useful for handling run-time-generated exceptions, like divide-by-zero or overflow.
However, the partial execution is internal to the coprocessor and is not visible to the ARM processor.
As far as the ARM processor is concerned, the instruction is held at the start of its execution and completes without exception if allowed to begin execution.
Any decision on whether to execute the instruction or cause an exception is taken within the coprocessor before the ARM processor is allowed to start executing the instruction.// arm1176 手册上的意思,像是 vfp 异常
The VFP supports all five floating point exceptions defined by the IEEE 754 standard:
• invalid operation
• divide by zero
• overflow
• underflow
• inexact.
You can individually enable or disable these exception traps.
If disabled, the default results defined by IEEE 754 are returned.
All rounding modes are supported, and basic single and basic double formats are used.
For full compliance, the VFP requires support code to handle arithmetic where operands or results are de-norms.
This support code is normally installed on the Undefined instruction exception handler.