2 AHB-Matrix DUT 端口信号列表

1. DW_ahb 框图

淡蓝色部分的外部接口，在本页面进行说明

2. 信号列表

提示：结合 DUT 端口代码，和 ahb databook signal description 阅读信号列表

信号	输入/出	说明
hclk	input
hresetn	input
观察类信号
hmaster[3:0]	output	表明当前哪个master has the owership for addr and control bus （AHB5）
hmaster_data[3:0]	output	表明当前哪个master has the owership for data bus (AMBA 标准中没有)
控制类信号
pause	input	asserted to put the arbiter into low-power mode by granting the dummy master owership of the bus
master 信号
haddr_m1/2/3[31:0]	input	AHB Addr Bus. addr bus for each master in the system.
hburst_m1/2/3[HBURST_WIDTH-1:0]	input	表明 transfer 是否为 burst 传输（的一部分）
hbusreq_m1/2/3[31:0]	input	asserted by master to request access to the bus.
hlock_m1/2/3[31:0]	input	asserted by master to carry out a locked trans.
hsize_m1/2/3[2:0]	input	indicates siae of transfer. （size: 8/16/32-it. max: 1024-bit）
htrans_m1/2/3[31:0]	input	indicates the type of transfer beding performed. (NONSEQ, SEQ, IDLE and BUSY)
hwdata_m1/2/3[31:0]	input	write data
hwrite_m1/2/3[31:0]	input	write signal. 1/0 : write/read.
hprot_m1/2/3[HPROT_WIDTH-1:0]	input	protection control signals.
hgrant_m1/2/3	output	asserted by arbiter, indicate the requensting master has own the ownership of the bus.
hready	output	ready response from selected slave. This signal is passed to all masters and slaves.
hresp[HRESP_WIDTH-1:0]	output	response signal, be passed to all AHB masters.
hrdata[31:0]	output	read data
Decoder 信号
NA	?	?
arbiter 信号
hsel_s0	output	when asserted, indicates the arbiter slave has been selected.
hready_resp_s0	output	response siganl, from arbiter slave interface. When asserted, current transfer has been completed. (AHB Lite?)
hresp_s0[HRESP_WIDTH-1:0]	output	transfer response from arbiter slave interface. (AHB2?)
hrdata_s0[AHB_DATA_WIDTH-1:0]	output	readback data from arbiter slave interface.
slave 信号
hready_resp_s1/2/3	input	response from slave. when asserted, current transfer has completed. (AHB LITE?)
hresp_s1/2/3[(HRESP_WIDTH-1:0)]	input	transfer response from individual slave. (AHB2?)
hrdata_s1/2/3	input	readback data from slaves.
hsel_s1/2/3	output	when asserted, the signal indicates that the slave has been selected. Each AHB slave has its own hsel_sj line. (this is generated by decoder block.)
hmasterlock	output	asserted to indicate the transfer currently in progress is part of a locked transaction. The signal is driven by the arbiter.
中断信号
ahbarbint	output	input signal to interrupt controller. the arbiter will flag an interrupt when an Early-Burst-Termination occurs.