202409012在飞凌的OK3588-C的核心板上使用Rockchip原厂的Buildroot点MIPI屏【屏参篇】

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已于 2024-09-12 19:28:58 修改

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202409012在飞凌的OK3588-C的核心板上使用Rockchip原厂的Buildroot点MIPI屏【屏参篇】
2024/9/12 11:52

缘起，拿到一块MIPI屏，需要使用飞凌的OK3588-C的核心板在Android12下点亮。
在飞凌的Linux R4下修改部分屏参之后即可直接点亮。

但是在飞凌的Android12下竖屏横用之后，播放MP4视频时内核跑飞。
因此需要使用Rockchip原厂的SDK来进行比对。
但是Rockchip原厂的Android12的过于庞大，我于是决定先在Buildroot下点亮屏之后再迁移到Android12上了。

root@rk3588-buildroot:/#
root@rk3588-buildroot:/# uname -a
Linux rk3588-buildroot 5.10.198 #1 SMP Thu Sep 12 11:01:26 CST 2024 aarch64 GNU/Linux
root@rk3588-buildroot:/#

Z:\OK3588_Linux_fs\kernel\arch\arm64\boot\dts\rockchip\OK3588-C-common.dtsi
Z:\repo_RK3588_Buildroot20240508\kernel\arch\arm64\boot\dts\rockchip\rk3588-evb7-v11.dtsi

2、配置DPHY（根据硬件使用的DPHY进行配置）

&mipi_dcphy0 {
status = "okay";
};

&mipi_dcphy1 {
status = "disabled";
};

Z:\OK3588_Linux_fs\kernel\arch\arm64\boot\dts\rockchip\OK3588-C-common.dtsi
【无配置】
Z:\repo_RK3588_Buildroot20240508\kernel\arch\arm64\boot\dts\rockchip\rk3588-evb7-v11.dtsi
【默认配置即可】
&mipi_dcphy0 {
status = "okay";
};

&mipi_dcphy1 {
status = "disabled";
};

3、配置dsi0连接的Port（把 dsi0 连接在 Port3 上）

/*
* mipi_dcphy0 needs to be enabled
* when dsi0 is enabled
*/
&dsi0 {
   status = "okay";
};

&dsi0_in_vp2 {
   status = "disabled";
};

&dsi0_in_vp3 {
   status = "okay";
};

Z:\OK3588_Linux_fs\kernel\arch\arm64\boot\dts\rockchip\OK3588-C-common.dtsi
【比较奇怪了，全部关闭了！】
/*
* mipi_dcphy0 needs to be enabled
* when dsi0 is enabled
*/
&dsi0 {
status = "disabled";
};

&dsi0_in_vp2 {
status = "disabled";
};

&dsi0_in_vp3 {
status = "disabled";
};

Z:\repo_RK3588_Buildroot20240508\kernel\arch\arm64\boot\dts\rockchip\rk3588-evb7-v11.dtsi
【默认配置即可】
/*
* mipi_dcphy0 needs to be enabled
* when dsi0 is enabled
*/
&dsi0 {
status = "okay";
};

&dsi0_in_vp2 {
status = "disabled";
};

&dsi0_in_vp3 {
status = "okay";
};

【暂不处理】
4、设置dsi0开机logo

&route_dsi0 {
   status = "okay";
   connect = <&vp3_out_dsi0>;
};

&route_dsi1 {
   status = "disabled";
   connect = <&vp3_out_dsi1>;
};

5、配置dsi0（重点配置屏幕的上电时序，一般由屏厂提供）

&dsi0 {
   status = "disabled";
   //rockchip,lane-rate = <1000>;
   dsi0_panel: panel@0 {
       status = "disabled";
       /* compatible = "sitronix,st7703", "simple-panel-dsi"; */
       compatible = "simple-panel-dsi";
       reg = <0>;

       /* 选择之前的配置的背光节点 */
backlight = <&backlight>;

       /* 设置 LCD 屏幕的上下电时序 */
init-delay-ms = <60>;
       reset-delay-ms = <60>;
       enable-delay-ms = <60>;
       prepare-delay-ms = <60>;
       unprepare-delay-ms = <60>;
       disable-delay-ms = <60>;
       dsi,flags = <(MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_BURST |
           MIPI_DSI_MODE_LPM | MIPI_DSI_MODE_EOT_PACKET)>;
       dsi,format = <MIPI_DSI_FMT_RGB888>;
       dsi,lanes = <4>;

       /* 设置 MIPI DSI 的上电指令 */
panel-init-sequence = [
           13 78 02 ee 50
           23 00 03 ea   85 55
           13 00 02 30 00
           29 00 04 39 02 07 10
           ...
           13 00 02 ee 00
           13 00 02 36 08
           05 78 01 11
           05 14 01 29
       ];

/* //设置 MIPI DSI 的下电指令 */
       panel-exit-sequence = [
           05 00 01 28
           05 00 01 10
       ];

       /* 设置 LCD 屏幕的显示时序（该部分内容一般都可以从对应屏幕的 datasheet 中获取） */
disp_timings0: display-timings {
           native-mode = <&dsi0_timing0>;
           dsi0_timing0: timing0 {
               clock-frequency = <60000000>;
               hactive = <800>;
               vactive = <1280>;
               hfront-porch = <14>;
               hsync-len = <12>;
               hback-porch = <12>;
               vfront-porch = <12>;
               vsync-len = <4>;
               vback-porch = <8>;
               hsync-active = <0>;
               vsync-active = <0>;
               de-active = <0>;
               pixelclk-active = <0>;
           };
       };

       ports {
           #address-cells = <1>;
           #size-cells = <0>;

           port@0 {
               reg = <0>;
               panel_in_dsi: endpoint {
                   remote-endpoint = <&dsi_out_panel>;
               };
           };
       };
   };

   ports {
       #address-cells = <1>;
       #size-cells = <0>;

       port@1 {
           reg = <1>;
           dsi_out_panel: endpoint {
               remote-endpoint = <&panel_in_dsi>;
           };
       };
   };

};

Z:\OK3588_Linux_fs\kernel\arch\arm64\boot\dts\rockchip\OK3588-C-common.dtsi

&dsi0 {
   status = "disabled";
   //rockchip,lane-rate = <1000>;
   dsi0_panel: panel@0 {
       status = "okay";
//       pinctrl-names = "default";
//       pinctrl-0 = <&mipi0_enable_gpio>;
       compatible = "simple-panel-dsi";
       reg = <0>;
       backlight = <&backlight_dsi0>;
       reset-delay-ms = <10>;
       enable-delay-ms = <10>;
       prepare-delay-ms = <10>;
       unprepare-delay-ms = <10>;
       disable-delay-ms = <60>;
       dsi,flags = <(MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_BURST |
           MIPI_DSI_MODE_LPM | MIPI_DSI_MODE_EOT_PACKET)>;
       dsi,format = <MIPI_DSI_FMT_RGB888>;
       dsi,lanes = <4>;
//       enable-gpios = <&gpio3 RK_PB2 GPIO_ACTIVE_HIGH>;

// panel-init-sequence = [
// ];

// panel-exit-sequence = [
// ];

       panel0_disp_timings0: display-timings {
           native-mode = <&panel0_7_1024x600>;
panel0_7_1024x600: timings {
hback-porch = <48>;
hfront-porch = <40>;
hactive = <1024>;
hsync-len = <48>;
vback-porch = <48>;
vfront-porch = <40>;
vactive = <600>;
vsync-len = <4>;
clock-frequency = <45000000>;
vsync-active = <0>;
hsync-active = <0>;
de-active = <0>;
pixelclk-active = <0>;
};
       };

       ports {
           #address-cells = <1>;
           #size-cells = <0>;

           port@0 {
               reg = <0>;
               panel_in_dsi0: endpoint {
                   remote-endpoint = <&dsi0_out_panel>;
               };
           };
       };
   };

   ports {
       #address-cells = <1>;
       #size-cells = <0>;

       port@1 {
           reg = <1>;
           dsi0_out_panel: endpoint {
               remote-endpoint = <&panel_in_dsi0>;
           };
       };
   };

};

Z:\repo_RK3588_Buildroot20240508\kernel\arch\arm64\boot\dts\rockchip\rk3588-evb7-v11.dtsi

&dsi0_panel {
   power-supply = <&vcc3v3_lcd_n>;
   reset-gpios = <&gpio0 RK_PD3 GPIO_ACTIVE_LOW>;
   pinctrl-names = "default";
   pinctrl-0 = <&lcd_rst_gpio>;
};

&dsi0_panel {
   power-supply = <&vcc3v3_lcd_n>;
   reset-gpios = <&gpio0 RK_PD3 GPIO_ACTIVE_LOW>;
   pinctrl-names = "default";
   pinctrl-0 = <&lcd_rst_gpio>;


       status = "okay";
//       pinctrl-names = "default";
//       pinctrl-0 = <&mipi0_enable_gpio>;
       compatible = "simple-panel-dsi";
       reg = <0>;
       //backlight = <&backlight_dsi0>;
       reset-delay-ms = <10>;
       enable-delay-ms = <10>;
       prepare-delay-ms = <10>;
       unprepare-delay-ms = <10>;
       disable-delay-ms = <60>;
       dsi,flags = <(MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_BURST |
           MIPI_DSI_MODE_LPM | MIPI_DSI_MODE_EOT_PACKET)>;
       dsi,format = <MIPI_DSI_FMT_RGB888>;
       dsi,lanes = <4>;
//       enable-gpios = <&gpio3 RK_PB2 GPIO_ACTIVE_HIGH>;

// panel-init-sequence = [
// ];

// panel-exit-sequence = [
// ];

       panel0_disp_timings0: display-timings {
           native-mode = <&panel0_7_1024x600>;
panel0_7_1024x600: timings {
hback-porch = <22>;
hfront-porch = <20>;
hactive = <1200>;
hsync-len = <8>;
vback-porch = <32>;
vfront-porch = <178>;
vactive = <1920>;
vsync-len = <8>;
clock-frequency = <161000000>;
vsync-active = <0>;
hsync-active = <0>;
de-active = <0>;
pixelclk-active = <0>;
};
       };
};

最终效果图：

参考资料：

https://blog.csdn.net/weixin_43244476/article/details/130217892?ops_request_misc=&request_id=&biz_id=102&utm_term=rockchip%20rk3588%20mipi%20dsi&utm_medium=distribute.pc_search_result.none-task-blog-2~all~sobaiduweb~default-1-130217892.142^v100^pc_search_result_base4&spm=1018.2226.3001.4187

https://blog.csdn.net/weixin_43244476/article/details/130217892
Rockchip RK3588 MIPI DSI 显示驱动调试记录

调试步骤：

1、LCD背光配置
&backlight {
   pwms = <&pwm1 0 25000 0>;
   status = "okay";
};

&pwm1 {
   /* mipi lcd backlight: pwm1_m1 */
   pinctrl-0 = <&pwm1m1_pins>;
   status = "okay";
};