nor闪存nand闪存
Today, we see that flash memory is available in many places, be it on your digital camera’s memory cards or the SPI flash, which stores the Arduino UNO program. However despite being called a “Flash memory”, the Flash technologies used in these applications are quite different. Flash memory comes in two technologies mainly — NAND and NOR. NAND flash is the one on your memory cards and MP3 players, while NOR flash is the one present in embedded applications such as your cell phones and those microcontroller boards you prototype with. Before you begin to scratch your head over why the types are named after universal logic gates or what difference in these seemingly similar ( both non-volatile memories ) make them suitable for different applications, take a look at the fundamental circuits of these technologies.
今天，我们看到闪存可用于许多地方，无论是在数码相机的存储卡上还是在存储Arduino UNO程序的SPI闪存上。 但是，尽管被称为“闪存”，但这些应用程序中使用的闪存技术却大不相同。 闪存主要有两种技术-NAND和NOR。 NAND闪存是存储卡和MP3播放器中的一种，而NOR闪存则是嵌入式应用程序(例如手机和原型的微控制器)中存在的一种。 在开始弄清楚为什么用通用逻辑门命名这些类型或这些看似相似的东西(这两个都是非易失性存储器)使它们适用于不同的应用之前，先了解一下这些技术的基本电路。
If you are not familiar with such diagrams, just know these few basics,
如果您不熟悉此类图表，只需了解以下几个基本知识，
Bitline is where you place the data to be stored during a write operation and from where you read the stored data during a read operation.
位线是在写操作期间放置要存储的数据的位置，在读操作期间从此处读取存储的数据的位置。
Wordline is the one that activates cells based on the address input both while reading and writing.
字线是一种在读取和写入时根据输入的地址激活单元的方法。
Sourceline connects all the sources to a common ground potential.
电源线将所有电源连接到公共接地电位。
Black dots at intersections of lines indicate the lines are in electrical contact at that point.
线的交点处的黑点表示线在该点处于电接触。
Each memory cell is a MOSFET with a floating gate capable of storing binary data in the form of an electric charge.
每个存储单元都是一个带有浮栅的MOSFET ，该浮栅能够以电荷形式存储二进制数据。
To simplify the differences between NAND and NOR, let’s consider an analogy.
为了简化NAND和NOR之间的差异，让我们考虑一个类比。
Visualise each cell as a house, and you are the data residing inside it. You coming out of the house to the road is equivalent to a data read operation (where data has to reach Bitline). Now take a look at the diagrams closely again. NOR flash is like living in an independent house from where you can walk to the street directly. On the other hand, NAND flash is like an apartment building with a house on each floor, so you’ll have to pass through the other floors to reach the street.
将每个单元格可视化为房屋，您就是其中的数据。 您从屋子出来到路上等同于数据读取操作(数据必须到达位线)。 现在，再次仔细查看这些图。 NOR闪存就像生活在独立的房屋中，您可以从那里直接步行到街上。 另一方面，NAND闪存就像是一栋公寓，每层都有一栋房屋，因此您必须穿过其他楼层才能到达街道。
Considering you walk at the same pace and the only elevator in the apartment is out of order, what takes more time?
考虑到您以相同的速度行走，并且公寓中唯一的电梯出现故障，那么需要花费更多时间吗？
Also, which design takes up more space on the earth for the same number of houses?
此外，对于相同数量的房屋，哪种设计会占用地球更多的空间？
The architectural distinction, which is obvious from the figure above, is that the Bitline and the Sourceline are connected to each cell in NOR flash while a string of cells in NAND flash is connected to the Bitline at one end and source line at the other end through select transistors.
从上图可以明显看出，体系结构上的区别是：位线和源极线连接到NOR闪存中的每个单元，而一串NAND闪存中的一串单元连接到一端的位线，另一端连接到源线通过选择晶体管。
A direct result of this connection is that a cell in NOR flash can be read much faster in comparison with the NAND flash. A typical NOR flash works in the order of nanoseconds similar to DRAM, whereas it takes in the order of several microseconds for a cell in NAND to be read as all the other cells in the string (which are typically 16 or 32 in number) have to be activated.
这种连接的直接结果是，与NAND闪存相比，NOR闪存中的单元读取速度更快。 典型的NOR闪存的工作时间与DRAM类似，以纳秒为单位，而读取字符串中的所有其他单元(通常为16或32个)时，读取NAND中的一个单元大约需要几微秒的时间。被激活。
In the physical design, NOR requires more space for each cell as they all have contact with the Bitline, making NAND the more compact option. The size consideration in NAND flash has made it popular in storage applications.
在物理设计中，NOR由于每个单元都与位线接触，因此每个单元都需要更多空间，从而使NAND成为更紧凑的选择。 NAND闪存的尺寸考虑已使其在存储应用中流行。
The reason behind the names is no mystery. The circuit diagram for the n-MOS implementation of NAND and NOR logic gates is as follows
名称背后的原因并不神秘。 NAND和NOR逻辑门的n-MOS实现的电路图如下
If you have not already guessed it, each MOSFET is connected to the output line directly in the NOR gate and at the end of a series of MOSFETs in the NAND gate giving the memory architectures their names.
如果您还没有猜到的话，那么每个MOSFET都直接在NOR门中以及在NAND门中一系列MOSFET的末端连接到输出线，从而给出了存储器架构的名称。
How to read data from the memory cells?
如何从存储单元读取数据？
A very common analogy to understand MOSFET is to understand the principles of a water tap, where the water flow resembles the motion of the charge carrier from source to drain. The water flow is regulated by changing the pressure via the valve, while in MOSFETs, the electron flow is controlled by changing the voltage applied at the gate terminal. Just as a minimum force is required to turn a tap on for water flow, a minimum voltage called the threshold voltage applied in the gate terminal (VTH) is required by the MOSFET to start conducting.
理解MOSFET的一个非常常见的类比是理解水龙头的原理，其中水流类似于电荷载流子从源极到漏极的运动。 通过改变通过阀门的压力来调节水流，而在MOSFET中，通过改变在栅极端子上施加的电压来控制电子流。 正如打开水龙头所需的最小力一样，MOSFET需要一个最小电压(称为阈值电压)施加在栅极端子(VTH)上，以开始导通。
The threshold voltage of a floating gate MOSFET depends on the amount of electrons trapped in the floating gate. If the floating gate is charged with electrons, this negative charge shields the channel region and hinders the process of channel formation between the source and drain. As a result, more voltage has to be applied for conduction, thus increasing the threshold voltage of the MOSFET. This technique is used to determine whether or not a memory cell is programmed.
浮栅MOSFET的阈值电压取决于浮栅中捕获的电子数量。 如果浮栅中充满电子，则该负电荷会屏蔽沟道区域并阻碍源极和漏极之间沟道的形成过程。 结果，必须施加更多的电压以进行传导，从而增加了MOSFET的阈值电压。 该技术用于确定存储单元是否被编程。
The programmed cell corresponds to the cell with a floating gate charged with electrons, while the erased cell corresponds to a floating gate with depleted electrons.
所编程的单元对应于具有被电子充电的浮栅的单元，而被擦除的单元对应于具有被耗尽的电子的浮栅。
VGSTH1 is the threshold voltage of the MOSFET in the erased state, and VGSTH2 is the threshold voltage of the MOSFET in the programmed state. A reference Voltage VTREF is chosen in between VGSTH1 and VGSTH2 and is applied to the cell. If the MOSFET conducts current, then it is in erased state else in a programmed state
VGSTH1是处于擦除状态的MOSFET的阈值电压，而VGSTH2是处于编程状态的MOSFET的阈值电压。 在VGSTH1和VGSTH2之间选择一个基准电压VTREF，并将其施加到电池上。 如果MOSFET导通电流，则它处于已擦除状态，否则处于已编程状态
How to program and erase?
如何编程和擦除？
Simple as the question sounds, we will now transfer electrons to the floating gate to program the cell and disperse the electron from the floating gate to erase it.
问题听起来很简单，我们现在将电子转移到浮栅以对单元进行编程，然后将电子从浮栅中驱散以擦除它。
The program operation for the cell is based on “Hot-Electron Injection”. To explain this better, know that you’re going to mess from your hostel. On your journey, you come across a burger spot. Now the burger spot is more appealing to you than the mess, so you end up heading there instead. Similarly, creating a potential difference between the source and the drain of about 4V will set the electrons to move from source to drain. By applying a high enough positive voltage of about 9V to the gate, the floating gate is at higher positive voltage than the drain. Hence, electrons are pulled into the floating gate, just like how you are pulled into the burger spot (Lockdown seems to have a higher pull over us, and hence we are trapped inside our homes :/)
单元的编程操作基于“ 热电子注入 ”。 为了更好地解释这一点，请注意您将被宿舍弄得一团糟。 在旅途中，您会遇到一个汉堡点。 现在，汉堡包比烂摊子对您更具吸引力，所以您最终还是去了那里。 类似地，在源极和漏极之间产生大约4V的电势差将使电子从源极移动到漏极。 通过向栅极施加足够高的约9V的正电压，浮栅处于比漏极更高的正电压。 因此，电子被拉到浮动门中，就像您被拉到汉堡位置一样( Lockdown似乎对我们有更高的拉动，因此我们被困在家中：/ )
Once inside the floating gate, these electrons no longer have the required energy to escape the confines of the floating gate, and they remain trapped — the cell is programmed.
一旦进入浮栅内部，这些电子将不再具有逃脱浮栅限制所需的能量，并且仍然被俘获-单元被编程。
The erase operation happens through the process known as “Fowler-Nordheim Tunneling”. Now that you are at the burger spot (the cell has been programmed) with the previously described analogy, you are being served with not so good food. Fortunately, you remember today’s mess menu is something that you love, so you leave the spot and go back to the mess. Similarly, by applying a large negative voltage (approximately -10V) to the gate and positive voltage to the MOSFETs body (approximately 8V), the electrons are repelled by the floating gate and tunneled through the oxide layer, which depletes the floating gate of electrons — the cell is erased.
擦除操作通过称为“ Fowler-Nordheim隧道效应”的过程进行 。 既然您已经按照前面的类比在汉堡点(该单元已被编程)，那么您所得到的食物就不是那么好了。 幸运的是，您还记得今天的烂摊子菜单是您喜欢的东西，因此您可以离开现场回到烂摊子。 同样，通过在栅极上施加较大的负电压(约-10V)，在MOSFET本体上施加正电压(约8V)，电子会被浮栅排斥并隧穿氧化层，从而耗尽了电子的浮栅。 —单元被删除。
Once programmed, data stays forever?
一旦编程，数据就永远存在吗？
The next big question now, because you know how a cell is programmed and erased, is how long it can maintain its programmed state. Typically we would like the data to be retained for at least a few years. To achieve this, the level of charge stored must be within a threshold limit to maintain data integrity. The state of charge degrades naturally as electrons slowly tunnel back to the channel. This degradation depends on factors like flash structure, amount of flash wear (number of P/E cycles performed on the cell), and the storage temperature.
由于您知道单元是如何编程和擦除的，因此下一个大问题是它可以维持其编程状态多长时间。 通常，我们希望将数据保留至少几年。 为此，存储的电荷级别必须在阈值限制内，以保持数据完整性。 随着电子缓慢地隧穿回到沟道，电荷状态自然退化。 这种降级取决于诸如闪光灯结构，闪光灯磨损量(在电池上执行的P / E循环次数)和存储温度等因素。
So an important factor to be considered about a flash cell is its endurance — the number of Program/Erase cycles an individual cell can undergo before the cell becomes unreliable.
因此，要考虑的闪存单元的重要因素是其耐用性-单个单元在变得不可靠之前可以经历的编程/擦除周期数。
Let’s consider a new hairband to demonstrate the endurance of a cell. You’ve got to stretch the new hairband by pulling it hard to fit your hair because of its small size. On repeated usage, the band loses its elasticity its rest position is bigger now. Moreover, the band cannot reach the maximum stretched state that a new, unused band can, till one day, there is almost no elasticity left and you cannot say the difference between the stretched and default states as they are the same.
让我们考虑一个新的发带，以展示细胞的耐力。 由于发束较小，因此必须通过拉力使其难以适应头发来拉伸。 反复使用后，表带失去弹性，现在的静止位置更大。 此外，该条带无法达到新的未使用的条带可以达到的最大拉伸状态，直到一天，几乎没有弹性，您无法说出拉伸状态和默认状态之间的差异，因为它们是相同的。
Something similar happens in a flash cell too. With repeated P/E cycles, the dielectric oxide layer is degraded due to electrons getting trapped in it. These trapped electrons result in a negatively charged oxide layer, which decreases the field strength raising the erase state threshold voltage, VGSTH1. During programming, these trapped electrons prevent electrons from tunneling into the floating gate, reducing charge that can be stored in the gate and resulting in a lower VGSTH2. The window between the thresholds closes, preventing further usage of the flash cell.
闪存单元中也会发生类似的情况。 在重复的P / E循环中，介电氧化物层由于电子被捕获而退化。 这些俘获的电子导致带负电的氧化物层，其降低了场强，从而提高了擦除状态阈值电压VGSTH1。 在编程期间，这些被俘获的电子可防止电子隧穿到浮栅中，从而减少可以存储在栅中的电荷，并导致较低的VGSTH2。 阈值之间的窗口关闭，从而阻止了闪存单元的进一步使用。
The trapped electrons enable trap assisted tunneling for the electrons stored in the floating gate, reducing the retention of data as the flash wears.
被捕获的电子能够为存储在浮栅中的电子实现陷阱辅助的隧穿，从而减少了随着闪存磨损而保留的数据。
Can we store more than 2 states in a single memory cell?
我们可以在一个存储单元中存储两个以上的状态吗？
From the above discussions, we have seen there exist two states depending on whether or not there are electrons in the floating gates (1 and 0). You might wonder why not have more than two states? Afterall the threshold voltage can be changed to a range of values by varying the charge stored in the floating gate. This results in multilevel flash memories, where we can store 2-bit values by having four states in a single erased cell (erased state, and 3 levels of different charges being stored in the floating gate).Therefore by creating 2 ⁿ-1 levels, we can store n bits in the same memory cell. MLCs (Multilevel cells) have a higher bit rate (more cost reduction). The main drawbacks with MLCs are that the number of write-cycles the cell can sustain reduces and the chances of error increases. It also has lesser retention than a single-level cell. Despite the drawbacks, MLCs are mainly used in products that don’t need long term reliability like USB Flash drives and portable media players.
从以上讨论中，我们看到根据浮动栅中是否有电子，存在两种状态(1和0)。 您可能想知道为什么没有两个以上的状态？ 毕竟，通过改变浮置栅极中存储的电荷，可以将阈值电压更改为一定范围的值。 这样就形成了多级闪存，我们可以通过在一个擦除单元中具有四个状态(被擦除的状态以及在浮动栅中存储3个不同电荷的水平)来存储2位值，因此可以创建2个ⁿ-1级，我们可以将n位存储在同一存储单元中。 MLC(多层单元)具有更高的比特率(更多的成本降低)。 MLC的主要缺点是单元可以维持的写周期数减少，并且出错的机会增加。 与单层单元相比，它的保留时间也更少。 尽管存在缺点，但MLC主要用于不需要长期可靠性的产品，例如USB闪存驱动器和便携式媒体播放器。
How much has Flash grown up?
Flash成长了多少？
One of the latest developments in the flash memory is 3D NAND which is literally the “Grown Up” version where strings of flash cells are built vertically in silicon. Such a design enables more bits to be packed in the same surface area, increasing density and reducing cost per bit. Promising almost 3X packing capacity than planar NAND, faster read/write, and more power efficiency, this technology may replace the current technologies and become “the solution” in cloud and enterprise storage!
闪存的最新发展之一是3D NAND ，它的字面意思是“ 成年”版本，其中闪存单元串以硅垂直地构建。 这样的设计使更多的钻头可以装在同一表面积内，从而提高了密度并降低了每钻头的成本。 与平面NAND相比，其包装容量有望提高近3倍，读/写速度更快，并且能效更高，该技术可能会取代现有技术，并成为云和企业存储中的“解决方案”！
This article is published as a part of the ‘Hardware Series’ under Spider Research and Development Club, NIT Trichy on a Tronix Thursday!
本文作为 Tronix星期四 NIT Trichy蜘蛛研究与发展俱乐部 下 的 “硬件系列” 的一部分发布 ！
翻译自: https://medium.com/spidernitt/flash-memory-5477ded015d1
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