硬件环境是ICORE FPGA与ARM的双核心开发板
STM32配置的FSMC的代码(寄存器操作模式):
static int
initialize(void)
{
GPIOD_R->CRH.W = 0xbbbbbbbb;
GPIOD_R->CRL.W = 0xbbbbbbbb;
GPIOE_R->CRH.W = 0xbbbbbbbb;
GPIOE_R->CRL.W = 0xbbbbbbbb;
FSMC_Bank1_R->BCR1 &= ~(1 << 1 | 1 << 2 | 1 << 3);
FSMC_Bank1_R->BCR1 |= 1 << 14; //EXTMOD
FSMC_Bank1_R->BTR1 = 0x300;
FSMC_Bank1E_R->BWTR1 = 0X300;
return 0;
}
icore 利用STM32的FSMC的地址总线AB23 AB22 跟CS 通过138译码器 扩展出4路片选信号,CS0,CS1,CS2,CS3
CS0为FPGA的片选信号 4路片选的宏定义如下所示:
#define CS0_BASE (0x60000000 + (0 << 23))
#define CS1_BASE (0x60000000 + (1 << 23))
#define CS2_BASE (0x600