mipi和isp处理_图像信号处理 (ISP) 流水线

产品描述

The logiISP-UHD Image Signal Processing Pipeline IP core is an Ultra High Definition (UHD, including 4K2K) ISP pipeline designed for digital processing and image quality enhancements of an input video stream in embedded designs based on Xilinx MPSoC, SoC and FPGA devices. The logiISP-UHD IP core accepts diversely formatted video inputs generated by different sensors and removes defective pixels, de-mosaics Bayer encoded video, makes image color and gamma corrections, filters the noise from the video, collects video analytics data for various control algorithms and manipulates video data formats and color domains. In addition to the standard IP core deliverables, Xylon offers licensable Auto White Balancing (AWB) and Auto Exposure (AE) processor-based control algorithms that work with the video analytics data collected by the ISP pipeline.

The logiISP IP core can be easily combined with the logiHDR High Dynamic Range (HDR) Pipeli