matlab 2014 coder,matlab 2014b HDL Coder Users Guide

【实例简介】

Matlab 官方有关于HDL coder开发的详细技术文档， HDL Coder可以把Simulink模型、MATLAB代码和Stateflow框图生成位真、周期精确、可综合的Verilog和VHDL代码，很适合用于FPGA/ASCI的快速开发，里面还有大量的例程等等

Contents

HDL Code generation from MATLaB

MATLAB Algorithm Design

Data Types and scope

1-2

Supported data T

U

suppy

ted data t

ype

1-3

Scope for variables

1-3

Operators

1-4

Arithmetic operate

1-4

Relational op

erators

1-4

ogical Op

erators

1-5

Control flow statements

1-6

Vector Function Limitations related to Control

1-7

PersistentⅤ ariables

1-8

Persistent Array variables

1-10

Complex data Type Support

1-11

D

eclaring complex signa

Is

1-11

Conversion Between Complex and real signals

1-12

Support for vectors of Complex Numb

1-12

ystem Objects

1-14

Why use System objects?

1-14

Predefined System Object

1-14

User-Defined System ob

1-14

Limitations of HDL Code Generation for System

Objects

1-15

System object Examples for HDL Code Generation.. 1-16

Predefined System Objects Supported for HDL Code

Generation

1-17

Load constants from a mat-file

1-18

Generate Code for User-Defined System Objects

1-19

How To Create a User-Defined System object

1-1

User-Defined System object Example

1-19

Map Matrices to ROM

1-22

Fixed-Point bitwise Functions

1-23

1-23

Bitwise Functions Supported for HDl Code Generation 1-23

Fixed-Point Run-Time Library functions

1-29

Fixed-Point function limitations

1-33

Model State with Persistent variables and Syste

Objects

1-34

Bit Shifting and bit rotation

1-8

Bit Slicing and Bit Concatenation

1-41

Guidelines for Efficient hdL code

1-43

MATLAB Design Requirements for HDL Code

Generation

1-44

What is a matlab test bench?

1-45

MATLAB Test Bench Requirements and best

ractices

1-46

MATLAB Test Bench requirements

1-46

MATLAB Test bench best practices

1-46

Contents

MATLAB Best Practices and Design Patterns for

HDL Code generation

2

Model a counter for hdl code generation

2-2

MATLAB Counter

2-2

MATLAB Code for the counter

2-3

Best Practices in this Example

2-4

Model a state machine for HDL Code Generation

2-5

MATLAB State machines

MATLAB Code for the Mealy State Machine

MATLAB Code for the moore state machine

2-7

Best practic

2-9

Generate hardware Instances For local functions

2-10

MATLAB Local functions

2-10

MATLAB Code for mlhdlc two counters. m

2-10

Implement RAM USing MATLAB Code

2-13

Implementation of RAM

2-13

Implement RAM Using a Persistent Array or System

object Properties

2-13

Implement RAM Using hdl. RAM

2-14

For-Loop best Practices for HDL Code generation

2-16

MATLAB Loops

2-16

Monotonically Increasing Loop Counters

2-16

Persistent Variables in Loops

2-17

Persistent Arrays in Loops

2-17

Fixed-Point Conversion

3

Floating-Point to Fixed-Point Conversion

3-2

Fixed-Point Type Conversion and Refinement

3-16

Working with Generated Fixed-Point Files

3-26

Specify Type Proposal Options

3-33

Log Data for Histogram

3-37

Automated Fixed-Point Conversion

3-40

License Requirements

3-40

Automated Fixed-Point Conversion Capabilities

3-40

Code Coverage

3-42

Proposing Data Types

3-45

Locking Proposed Data Types

3-47

Viewing functions

3-47

lew1

ariables

3-48

Istogram ...

3-54

Function Replacements

3-56

Validating Types

3-57

g Numerics

3-57

Detecting Overflows

3-57

Custom plot functions

3-59

Visualize Differences Between Floating-Point and Fixed-

Point results

3-61

Inspecting Data Using the Simulation Data Inspector 3-67

What Is the Simulation Data Inspecto

3-67

Import Logged Data

3-67

Export Logged data

3-67

Group signals

3-67

Run optio

ns

3-68

Create Report

3-68

Comparison Options

3-68

Enabling Plotting Using the Simulation Data Inspector 3-68

Save and Load simulation Data Inspector Sessions

3-68

Enable Plotting Using the Simulation Data Inspector 3-70

From the UI

3-70

From the Command Line

3-70

Replacing Functions Using Lookup Table

Approximations

·

3-72

Replace a custom function with a lookup Table

3-73

From the UI

3-73

i Contents

From the Command line

3-81

Replace the exp Function with a Lookup Table

3-84

From the ui

3-84

From the Command line

3-92

Data Type Issues in Generated Code

3-94

Enable the highlight Option in a MaTLAB Coder

Project

3-94

Enable the Highlight Option at the Command Line... 3-94

Stowaway doubles

3-94

Stowaway singles

3-94

Expensive Fixed-Point operations

3-94

Code Generation

Create and set Up Your Project

4-2

Create a New Project

4-2

Open an Existing Project

Add Files to the project

4-4

Primary Function Input Specification

4-6

When to Specify Input Properties

4-6

Why You must Specify Input Properties

4-6

Properties to Specify

4-6

Rules for Specifying Properties of Primary Inputs

4-8

Methods for Defining Properties of Primary Inputs

4-8

Basic hdl code generation with the workflow

Advisor

4-10

HDL Code Generation from System Objects

4-14

Generate Instantiable code for functions

4-19

How to generate Instantiable Code for Functions

4-19

Generate Code Inline for Specific Functions

4-19

Limitations for instantiable code generation for

Functions

4-19

Integrate Custom HDL Code Into MATLAB Design.. 4-21

Define the hdl. Black Box System object

4-21

Use System object In MATLAB Design Function

4-23

Generate HDL Code

4-23

limitations for hdl. black box

4-26

Enable matLab function block generation

4-27

Requirements for MaTLAB Function Block Generation 4-27

Enable matlab function block generation

4-27

Results of matlab function block generation

4-27

System Design with HDL Code Generation from

MATLAB and simulink

4-28

Generate Xilinx System Generator Black Box Block

4-32

Requirements for System Generator Black Box Block

Generation

4-32

Enable System Generator black Box block Ge

Results of System Generator Black Box Bloc neration

4-32

Generation

4-33

Generate Xilinx System Generator for DsP black box

from MATLAB HDL Design

4-34

Generate HDL Code from MATLAB Code Using the

Command line interface

4-40

Specify the Clock Enable rate

4-45

Why specify the clock Enable rate?

4-45

How to Specify the clock Enable rate

4-45

Specify Test Bench Clock Enable Toggle rate

4-47

When to Specify Test Bench Clock Enable Toggle rate

4-47

How to Specify Test Bench Clock Enable Toggle rate

4-47

Generate an HDL Coding Standard report from

MATLAB

4-49

Using the hdl Workflow advisor

4-49

Using the Command Line

4-51

Generate an HDL Lint Tool script

4-53

How To generate an hdl lint Tool Script

4-53

Contents

Generate a Board-Independent Ip core from MATLAB 4-55

Generate a board-Independent Ip core

4-55

Requirements and Limitations for IP Core generation

4-57

Minimize clock enables

4-58

Using the GUi

4-59

Using the Command Line

4-59

Limitations

4-59

Verification

Verify Code with HDL Test Bench

5-2

Generate Test bench with file i/o

When to Use file i/o In Test bench

5-5

How Test bench generation with file i/o works

5-5

Test Bench Data files

5-5

How to generate Test bench with file i/o

5-6

Limitations When Using File 1/0 In Test Bench

5-6

Deployment

Generate Synthesis Scripts

6-2

Optimization

7

RAM Mapping

7-2

Map persistent Arrays and dsp. Delay to RAM

7-3

How To Enable RaM Mapping

7-3

RAM Mapping requirements for Persistent Arrays and

System object Properties

RAM Mapping Requirements for dsp. Delay System

ob

7-6

RAM Mapping Comparison for MATLAB Code

7-8

Pipelining

7-9

Port registers

7-9

Input and Output Pipeline registers

7-9

Variable pipelining

7-9

Register Inputs and Outputs

7-10

Insert Input and Output Pipeline registers

7-11

Distributed Pipelining

7-12

What is Distributed Pipelin

7-12

Benefits and Costs of Distributed pipelining

7-12

Selected Bibliograph

7-12

Pipeline matlab variables

7-13

Using the hdl Workflow Advisor

7-13

Using the Command Line Interface

7-13

Limitations of MatlAB Variable Pipelining

7-13

Optimize MatLAb loops

7-15

oop Streaming

7-15

Loop unrolling

7-15

How to Optimize maTLaB loops

7-15

Limitations for MaTLAB Loop Optimization

7-16

Constant Multiplier optimization

7-17

Specify constant multiplier optimization

7-19

Distributed Pipelining for Clock Speed Optimization

7-20

Map Matrices to Block RAMs to Reduce Area

7-27

Resource Sharing of Multipliers to Reduce Area

7-32

Loop streaming to Reduce Area

7-41

Contents

【实例截图】

【核心代码】