IIC Basics
-START POINT -> SCL HIGH SDA DOWN
- STOP POINT -> SCL HIGH SDA UP
- ACK (1bit clk when SDA low)
- 8BIT(7bits ADDR, 1bit Resquest)
SEQUENCE:
START >> ADDR(7bit)+R/W(1bit) >> ACK >> DATA(8bits) >> ACK >>STOP
Write Sequence
You know I am hardware guy
So I need to know how the IIC structure in circuit.
-MSB
-LSB
Need to be within the max rise time specification
-Rise time = RCLn[E/(E-Vt)]
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