摘要:
Surface culling sets the pros and cons of triangles,and removes given surfaces as well in GPU,which reduces the amount of computation for surface culling,and plays a key role for increasing the graphic processing performance.This paper deduces the backface culling algorithm in detail,and then,proposes a kind of backface culling unit(BCU) structure.Modules functions and processing flow of BCU are descripted,and further,three kinds of computing core implementation shemes for BCU hardware accelerating are proposed.We verify and evaluate the three different BCU implements on Xilinx Vertex6 XC6VLX760 FPGA prototype from resource,frequency and computing period.As a result,the frequency of prototype is up to 198MHz,BCU functions are correct and minimum share unit scheme is optimum choice.In addition,we synthesize the BCU RTL under SMIC 65nm CMOS library by using Synopsys Design-Compiler.The frequency of BCU design is up to 341MHz,which meets the design requirements.
展开