软件在环 (SIL) 和处理器在环 (PIL) 仿真概述。
Test code generated from top models, referenced models, or subsystems.
Customize PIL simulation for your target environment.
Use the rtiostream API for communication between your
development computer and target hardware during a PIL simulation.
Specify a hardware timer using the Code Replacement Tool.
Provide PIL connectivity between Simulink® and the target hardware.
Specify compiler directives for building PIL application that supports code
coverage analysis and execution profiling.
Set up and run top-model PIL, Model block PIL, and PIL block
simulations.
A simplified workflow for verifying generated code.
How a PIL simulation proceeds.
How the simulation mode of the top model or parent model determines the
simulation behavior of a model hierarchy.
仿真电机控制系统,生成控制器代码,并使用 PIL 仿真测试数值等效性和探查代码执行时间。
Security measures for PIL simulations.
Modeling and code generation features that are not supported or partially
supported by SIL and PIL simulations.