熟悉nvme 协议是深入理解spdk 代码的基础。而理解协议中的重要寄存器和数据结构是理解协议的基础,下面就一起总结下协议中的重要寄存器和数据结构。
重要寄存器
下面寄存器都是位于pcie memory space, bar[0/1] 空间。
Offset 24h: AQA – Admin Queue Attributes
The Admin Submission Queue’s priority is determined by the arbitration mechanism selected, refer to section 4.11. The Admin Submission Queue and Admin Completion Queue are required to be in physically contiguous memory.
Offset 28h: ASQ – Admin Submission Queue Base Address
This register defines the base memory address of the Admin Submission Queue.
Offset 30h: ACQ – Admin Completion Queue Base Address
This register defines the base memory address of the Admin Completion Queue.
上面queue中的每个entry指向的地址落在controller memroy buffer. 就是下面下面两个寄存器相关的区域。
Offset 38h: CMBLOC – Controller Memory Buffer Location
This optional register defines the location of the Controller Memory Buffer (refer to sectio