同步整流芯片UCC24610D的使用

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最新推荐文章于 2022-06-29 22:23:17 发布

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分类专栏：电力电子模拟电子

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UCC24610D

Secondary side synchronous rectifier controller

应用

UCC24610D在LLC电路中的应用

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UCC24610D在Flyback电路中的应用

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引脚功能

PIN	Description
EN/TOFF	Combined enable function and programmable off-time timer. 当Vcc低于门限值的时候，芯片处于UVLO(Under Voltage Lock Out, 欠压锁定)模式，在芯片内部EN/TOFF连接到一个10k欧姆的电阻而不是电流源；当Vcc处于正常工作电压的时候，EN/TOFF连接到电流源。针对此情况，EN/TOFF引脚的电压programs the minimum off-time for the MOSFET。
GATE	In sleep mode and UVLO, GATE impedance to GND is about 1.6 Ω. GATE impedance to GND crests about 80 Ω, when VCC ≈ 1.1 V
GND	Connect a 0.1-µF or larger ceramic bypass capacitor from the VCC pin to the GND pin through very short PC-board tracks.
SYNC	SYNC (gate turnoff synchronization), a falling edge on SYNC immediately forces GATE low, turning off the controlled MOSFET asynchronous to the voltage on the drain and source, and regardless of the state of the TON timer
TON	TON (programmable on-time timer), program the minimum on time with a resistor from TON to GND.
VD	VD (drain-sense voltage).

为什么要设置Toff？Because V DS of the SR-MOSFET may ring above 1.5 V and back below –150 mV one or more times (due to circuit parasitic elements), TOFF time should be programmed to block GATE re-arming for the duration of this ringing.

同理，对于Ton的设置。Because V DS of the SR-MOSFET may ring above –5 mV one or more times immediately after turn on (due to circuit parasitic elements) TON time should be programmed to block GATE turn off for the duration of this spurious ringing.