出现报错:Short-Circuit Constraint: Between Polygon Region (52 hole(s)) Top Layer And Via from Top Layer to Bottom Layer Location : [X = 0mil][Y = 0mil]
铺铜的Clearance中
Via 和Copper的间距之前设为0了,可能会出现以下问题
DRC
修改后,铺铜
正常,DRC正常
【AD DRC错误】Short-Circuit Constraint: Between Polygon Region (52 hole(s)) Top Layer And Via fro
于 2022-02-18 10:32:14 首次发布