问题描述:
在uvm环境搭建过程中,当在使用imp端口的时候,新手容易和port以及export弄混。port和export例化时只需声明传输的数据类型。而imp则还需申明端口所在模块。
例:
uvm_blocking_put_port#(my_transaction)
uvm_blocking_put_export#(my_transaction)
uvm_blocking_put_imp#(my_transaction, this)
其中,this在这里指的是当前端口所在类
如果在使用imp端口时不指明所在类,则可能出现如下错误:
Illegal assignment to class mtiUvm.uvm_pkg::uvm_port_base #(class mtiUvm.uvm_pkg::uvm_tlm_if_base #(Frm_pkg.struct packed , Frm_pkg.struct packed )) from class mtiUvm.uvm_pkg::uvm_tlm_fifo #(Frm_pkg.struct packed )
Illegal assignment to class mtiUvm.uvm_pkg::uvm_port_base #(class mtiUvm.uvm_pkg::uvm_tlm_if_base #(Frm_pkg.struct packed , Frm_pkg.struct packed )) from class mtiUvm.uvm_pkg::uvm_tlm_fifo #(Frm_pkg.struct packed )
解决方案:
imp端口申明所在类,则问题得以解决。
例:
class data_checker extends uvm_scoreboard;
...
uvm_blocking_put_imp_pro #(mon_data_t, data_checker) data_bp_imp;
...
endclass