HDLBits verlog刷题-Finding bugs in code-03_MUX4

网站链接

HDLBITs_reading simulations

题目描述-Bugs mux4

This 4-to-1 multiplexer doesn’t work. Fix the bug(s).
You are provided with a bug-free 2-to-1 multiplexer:
module mux2 (
input sel,
input [7:0] a,
input [7:0] b,
output [7:0] out
);
简言之
用多个已写好的2选1-------实现4选1

参考资料

代码部分

//用多个2选1-----实现4选1
/*************分析*****************
2选1多路器---sel=1 输出a，sel=0,输出b
4选1
	sel	 11		a
	sel   10		b
	sel   01		c
	sel  00	        d
	1.先判断sel[0]
    ab选1  cd选1
    2.判断sel[1]
    假设  sel[0]=1
    选出  a c
    再判断
**************************************/
module top_module (
    input [1:0] sel,
    input [7:0] a,
    input [7:0] b,
    input [7:0] c,
    input [7:0] d,
    output [7:0] out  ); //
/*****************错误**************
    wire mux0, mux1;
    mux2 mux0 ( sel[0],    a,    b, mux0 );
    mux2 mux1 ( sel[1],    c,    d, mux1 );
    mux2 mux2 ( sel[1], mux0, mux1,  out );
****************************************/
/***************正确***********************/
    wire [7:0] mux0;
    wire [7:0] mux1;
    //先判断sel[0]，ab选1  cd选1
    mux2 mux_0 ( sel[0],    a,    b, mux0 );
    mux2 mux_1 ( sel[0],    c,    d, mux1 );
    //判断sel[1]
    mux2 mux_2 ( sel[1], mux0, mux1,  out );
endmodule

/****************该模块已存在******************
module mux (
    input sel,
    input [7:0] a,
    input [7:0] b,
    output [7:0]out  );
    
    assign out = sel?a:b;
    
endmodule
*****************************************/