PART II SYSTEMS PROGRAMMING

PART II SYSTEMS PROGRAMMING
Chapter 4 Systems Architecture
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Many of the architectural features of the 80386 are used only by systems
programmers. This chapter presents an overview of these aspects of the
architecture.
The systems-level features of the 80386 architecture include:
Memory Management
Protection
Multitasking
Input/Output
Exceptions and Interrupts
Initialization
Coprocessing and Multiprocessing
Debugging
These features are implemented by registers and instructions, all of which
are introduced in the following sections. The purpose of this chapter is not
to explain each feature in detail, but rather to place the remaining
chapters of Part II in perspective. Each mention in this chapter of a
register or instruction is either accompanied by an explanation or a
reference to a following chapter where detailed information can be obtained.

很多386的特性只有系统软件才能使用，这章展示了这些特性。

这些特性执行是由指令和寄存器完成的。 

 

4.1 Systems Registers
The registers designed for use by systems programmers fall into these
classes:
EFLAGS
Memory-Management Registers
Control Registers
Debug Registers
Test Registers
4.1.1 Systems Flags
The systems flags of the EFLAGS register control I/O, maskable interrupts,
debugging, task switching, and enabling of virtual 8086 execution in a
protected, multitasking environment. Theseflags are highlighted in Figure

4.1 系统寄存器

为系统编程者使用设计的寄存器可以分为一下几类

标志寄存器

内存管理寄存器

调试寄存器

测试寄存器

4.1。1

系统标志寄存器的标志位可以在一个保护的多任务的环境中控制输入输出 可屏蔽中断 调试  任务转化 和虚拟8086可用。

4.1.2 Memory-Management Registers
Four registers of the 80386 locate the data structures that control
segmented memory management:
GDTR Global Descriptor Table Register
LDTR Local Descriptor Table Register
These registers point to the segment descriptor tables GDT and LDT.
Refer to Chapter 5 for an explanation of addressing via descriptor
tables.
IDTR Interrupt Descriptor Table Register
This register points to a table of entry points for interrupt handlers
(the IDT). Refer to Chapter 9 for details of the interrupt mechanism.
TR Task Register
This register points to the information needed by the processor to define
the current task. Refer to Chapter 7 for a description of the
multitasking features of the 80386.

内存管理寄存器，386有4个寄存器指定控制分段内存管理的数据结构。

全局描述符寄存器

局部描述符寄存器

中断描述符寄存器

任务寄存器