VGA协议与图像输出Verilog编程
一、基于Verilog HDL的数字秒表仿真
实验环境：Quartues 13.0
1.1创建工程以及verilog HDL文件
1.2在文件中编写时钟代码
参考代码：
module Clock(clk,reset,pause,msh,msl,sh,sl,minh,minl);
//其中msh为百分秒的十位,msl为百分秒的个位,sh为秒的十位,sl为秒的个位,minh为分的十位,minl为分的个位
input clk,reset,pause;//时钟，复位，暂停
output [3:0] msh,msl,sh,sl,minh,minl;//输出
reg [3:0] msh,msl,sh,sl,minh,minl;//寄存器
reg count1,count2;//寄存器
//设置百分秒
always @(posedge clk or posedge reset)//时钟上升沿或复位上升沿
begin
if(reset)//信号为复位时
begin
{msh,msl}<=0;//百分秒十位和百分秒个位赋0
count1<=0;//寄存器count1赋0
end
else if(!pause)//信号不是复位不是暂停时
begin
if(msl==9)//如果百分秒个位为9
begin
msl<=0;//百分秒个位赋0
if(msh==9)//如果百分秒十位为9
begin
msh<=0;//百分秒十位赋0
count1<=1;//寄存器count1赋1
end
else//如果百分秒十位不为9
msh<=msh+1;//百分秒十位加1
end
else//如果百分秒个位不为9
begin
msl<=msl+1;//百分秒个位加1
count1<=0;//寄存器coount1赋0
end
end
end
//设置秒
always @(posedge count1 or posedge reset)//信号为寄存器count1上升沿或复位上升沿时
begin
if(reset)//信号为复位
begin
{sh,sl}<=0;//秒的十位和个位赋0
count2<=0;//寄存器count2赋0
end
else if(sl==9)//秒的个位为9
begin
sl<=0;//秒个位赋0
if(sh==5)//秒十位为5
begin
sh<=0;//秒十位赋0
count2<=1;//寄存器count2赋1
end
else //秒十位不为5
sh<=sh+1;//秒十位加1
end
else//秒个位不为9
begin
sl<=sl+1;//秒个位加1
count2<=0;//寄存器count2赋0
end
end
//设置分
always@(posedge count2 or posedge reset)//寄存器count2上升沿或复位上升沿
begin
if(reset)//信号为复位
begin
minh<=0;//分十位赋0
minl<=0;//分个位赋0
end
else if(minl==9)//信号为分个位为9
begin
minl<=0;//分个位赋0
if(minh==5)//分十位为5
minh<=0;//分十位赋0
else//分十位不为5
minh<=minh+1;//分十位加1
end
else//分个位不为9也不是复位
minl<=minl+1;//分个位加1
end
endmodule
1.3综合编译
1.4进行仿真
1.时钟频率设置
我是使用的默认50Hz。
2.进行功能仿真
二、VGA简介
VGA（Video Graphics Array）视频图形阵列是IBM于1987年提出的一个使用模拟信号的电脑显示标准。VGA接口即电脑采用VGA标准输出数据的专用接口。具有分辨率高、显示速率快、颜色丰富等优点。随着电子产业及视频图像处理技术的发展，VGA(视频图形阵列)作为一种标准的显示接口在视频和计算机领域得到了广泛的应用。
VGA协议的通信原理
VGA通信时序图：
三、通过Verilog编程实现VGA端口的汉字图案显示
1.硬件设计
在quartus中创建一个新的工程，并在新的工程中添加新的HDL文件,由于之前的的练习中，我们都创建过工程以及HDL文件，因此我就不在这里赘述了。创建HDL文件用于verilog编程。打开pin planner 进行管脚的设计
设计完成之后直接关掉此页面就行了。
2.软件设计
1.在创建的HDL文件中编写代码
代码如下：
module snake(
OSC_50, //原CLK2_50时钟信号
VGA_CLK, //VGA自时钟
VGA_HS, //行同步信号
VGA_VS, //场同步信号
VGA_BLANK, //复合空白信号控制信号 当BLANK为低电平时模拟视频输出消隐电平，此时从R9~R0,G9~G0,B9~B0输入的所有数据被忽略
VGA_SYNC, //符合同步控制信号 行时序和场时序都要产生同步脉冲
VGA_R, //VGA绿色
VGA_B, //VGA蓝色
VGA_G); //VGA绿色
input OSC_50; //外部时钟信号CLK2_50
output VGA_CLK,VGA_HS,VGA_VS,VGA_BLANK,VGA_SYNC;
output [7:0] VGA_R,VGA_B,VGA_G;
parameter H_FRONT = 16; //行同步前沿信号周期长
parameter H_SYNC = 96; //行同步信号周期长
parameter H_BACK = 48; //行同步后沿信号周期长
parameter H_ACT = 640; //行显示周期长
parameter H_BLANK = H_FRONT+H_SYNC+H_BACK; //行空白信号总周期长
parameter H_TOTAL = H_FRONT+H_SYNC+H_BACK+H_ACT; //行总周期长耗时
parameter V_FRONT = 11; //场同步前沿信号周期长
parameter V_SYNC = 2; //场同步信号周期长
parameter V_BACK = 31; //场同步后沿信号周期长
parameter V_ACT = 480; //场显示周期长
parameter V_BLANK = V_FRONT+V_SYNC+V_BACK; //场空白信号总周期长
parameter V_TOTAL = V_FRONT+V_SYNC+V_BACK+V_ACT; //场总周期长耗时
reg [10:0] H_Cont; //行周期计数器
reg [10:0] V_Cont; //场周期计数器
wire [7:0] VGA_R; //VGA红色控制线
wire [7:0] VGA_G; //VGA绿色控制线
wire [7:0] VGA_B; //VGA蓝色控制线
reg VGA_HS;
reg VGA_VS;
reg [10:0] X; //当前行第几个像素点
reg [10:0] Y; //当前场第几行
reg CLK_25;
always@(posedge OSC_50)
begin
CLK_25=~CLK_25; //时钟
end
assign VGA_SYNC = 1'b0; //同步信号低电平
assign VGA_BLANK = ~((H_Cont<H_BLANK)||(V_Cont<V_BLANK)); //当行计数器小于行空白总长或场计数器小于场空白总长时，空白信号低电平
assign VGA_CLK = ~CLK_to_DAC; //VGA时钟等于CLK_25取反
assign CLK_to_DAC = CLK_25;
always@(posedge CLK_to_DAC)
begin
if(H_Cont<H_TOTAL) //如果行计数器小于行总时长
H_Cont<=H_Cont+1'b1; //行计数器+1
else H_Cont<=0; //否则行计数器清零
if(H_Cont==H_FRONT-1) //如果行计数器等于行前沿空白时间-1
VGA_HS<=1'b0; //行同步信号置0
if(H_Cont==H_FRONT+H_SYNC-1) //如果行计数器等于行前沿+行同步-1
VGA_HS<=1'b1; //行同步信号置1
if(H_Cont>=H_BLANK) //如果行计数器大于等于行空白总时长
X<=H_Cont-H_BLANK; //X等于行计数器-行空白总时长 （X为当前行第几个像素点）
else X<=0; //否则X为0
end
always@(posedge VGA_HS)
begin
if(V_Cont<V_TOTAL) //如果场计数器小于行总时长
V_Cont<=V_Cont+1'b1; //场计数器+1
else V_Cont<=0; //否则场计数器清零
if(V_Cont==V_FRONT-1) //如果场计数器等于场前沿空白时间-1
VGA_VS<=1'b0; //场同步信号置0
if(V_Cont==V_FRONT+V_SYNC-1) //如果场计数器等于行前沿+场同步-1
VGA_VS<=1'b1; //场同步信号置1
if(V_Cont>=V_BLANK) //如果场计数器大于等于场空白总时长
Y<=V_Cont-V_BLANK; //Y等于场计数器-场空白总时长 （Y为当前场第几行）
else Y<=0; //否则Y为0
end
reg valid_yr;
always@(posedge CLK_to_DAC)
if(V_Cont == 10'd32) //场计数器=32时
valid_yr<=1'b1; //行输入激活
else if(V_Cont==10'd512) //场计数器=512时
valid_yr<=1'b0; //行输入冻结
wire valid_y=valid_yr; //连线
reg valid_r;
always@(posedge CLK_to_DAC)
if((H_Cont == 10'd32)&&valid_y) //行计数器=32时
valid_r<=1'b1; //像素输入激活
else if((H_Cont==10'd512)&&valid_y) //行计数器=512时
valid_r<=1'b0; //像素输入冻结
wire valid = valid_r; //连线
wire[10:0] x_dis; //像素显示控制信号
wire[10:0] y_dis; //行显示控制信号
assign x_dis=X; //连线X
assign y_dis=Y; //连线Y
parameter
char_line00=272'hFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF,
char_line01=272'h00000000000000000000000000000000000000000000000000000000000000000000,
char_line02=272'h00400C0000000000000000000000000000C008000000000000000000000000000000,
char_line03=272'h00700E0000000180000000000000000000E00C0000000000000000800180000000C0,
char_line04=272'h00600C00000003C0000000000000000000C01C0000000000000000FFFF80000001E0,
char_line05=272'h00600C3003FFFC000000000000000080008018000000000000800080018003FFFE00,
char_line06=272'h1FFFFFF8000180007FFE7FF003C80380008018007C1F03C803800080018000000000,
char_line07=272'h00600C0000018000180E18180E3803800104301018040E3803800080018000000000,
char_line08=272'h00600C00000180001802180C080803800FFE30381804080803800080018000000000,
char_line09=272'h00600C000001800018031806180802800C0C7FF818041808028000FFFF8000000000,
char_line0a=272'h007FFC000001800018011806300406C00C0C60300C08300406C00080018000000000,
char_line0b=272'h00600C000001800018001806300404C00C0CC0300C08300404C00080018000000018,
char_line0c=272'h00600C000001801018081806200004C00C0C80300C08200004C0008001800000003C,
char_line0d=272'h007FFC000001803818081806600004C00C0D00300C08600004C0008001803FFFFFFE,
char_line0e=272'h00600C003FFFFFFC1818180C60000C600C0D4030061060000C6000FFFF8000018000,
char_line0f=272'h00600C10000180001FF81818600008600C0E20300610600008600080010000018000,
char_line10=272'h00600C380001800018181FF0600008600C0C10300610600008600008200000418000,
char_line11=272'h3FFFFFFC0001800018081800600008600FFC1830073060000860000C382000718800,
char_line12=272'h003208000001800018081800603F1FF00C0C18300320603F1FF0080C307000E18600,
char_line13=272'h00618C000001800018001800600C10300C0C0C300320600C10300C0C307000C18300,
char_line14=272'h00C106000001800018001800600C10300C0C08300320600C1030060C30C001818180,
char_line15=272'h018101C00001800018001800300C10300C0C003001C0300C1030030C30C0038180C0,
char_line16=272'h030104FC0001800018001800300C30300C0C003001C0300C3030038C318003018060,
char_line17=272'h0C010E380001800018001800180C20180C0C003001C0180C2018018C330006018070,
char_line18=272'h187FF0000001800018001800180C20180C0C003001C0180C2018018C36000C018038,
char_line19=272'h6001000000018000180018000C1060180C0C003000800C106018008C380018018038,
char_line1a=272'h00010000000180007E007E0003E0F83E0C0C0030008003E0F83E000C301010018010,
char_line1b=272'h00010000003F800000000000000000000FFC0C60000000000000000C303820738000,
char_line1c=272'h00010060000F800000000000000000000C0C03E00000000000001FFFFFFC001F8000,
char_line1d=272'h1FFFFFF00007000000000000000000000C0801C00000000000000000000000070000,
char_line1e=272'h00000000000000000000000000000000000000800000000000000000000000020000,
char_line1f=272'h00000000000000000000000000000000000000000000000000000000000000000000;
reg[8:0] char_bit;
always@(posedge CLK_to_DAC)
if(X==10'd144)char_bit<=9'd272; //当显示到144像素时准备开始输出图像数据
else if(X>10'd144&&X<10'd416) //左边距屏幕144像素到416像素时 416=144+272（图像宽度）
char_bit<=char_bit-1'b1; //倒着输出图像信息
reg[29:0] vga_rgb; //定义颜色缓存
always@(posedge CLK_to_DAC)
if(X>10'd144&&X<10'd416) //X控制图像的横向显示边界：左边距屏幕左边144像素 右边界距屏幕左边界416像素
begin case(Y) //Y控制图像的纵向显示边界：从距离屏幕顶部160像素开始显示第一行数据
10'd160:
if(char_line00[char_bit])vga_rgb<=30'b1111111111_0000000000_0000000000; //如果该行有数据 则颜色为红色
else vga_rgb<=30'b0000000000_0000000000_0000000000; //否则为黑色
10'd162:
if(char_line01[char_bit])vga_rgb<=30'b1111111111_0000000000_0000000000;
else vga_rgb<=30'b0000000000_0000000000_0000000000;
10'd163:
if(char_line02[char_bit])vga_rgb<=30'b1111111111_0000000000_0000000000;
else vga_rgb<=30'b0000000000_0000000000_0000000000;
10'd164:
if(char_line03[char_bit])vga_rgb<=30'b1111111111_0000000000_0000000000;
else vga_rgb<=30'b0000000000_0000000000_0000000000;
10'd165:
if(char_line04[char_bit])vga_rgb<=30'b1111111111_0000000000_0000000000;
else vga_rgb<=30'b0000000000_0000000000_0000000000;
10'd166:
if(char_line05[char_bit])vga_rgb<=30'b1111111111_0000000000_0000000000;
else vga_rgb<=30'b0000000000_0000000000_0000000000;
10'd167:
if(char_line06[char_bit])vga_rgb<=30'b1111111111_0000000000_0000000000;
else vga_rgb<=30'b0000000000_0000000000_0000000000;
10'd168:
if(char_line07[char_bit])vga_rgb<=30'b1111111111_0000000000_0000000000;
else vga_rgb<=30'b0000000000_0000000000_0000000000;
10'd169:
if(char_line08[char_bit])vga_rgb<=30'b1111111111_0000000000_0000000000;
else vga_rgb<=30'b0000000000_0000000000_0000000000;
10'd170:
if(char_line09[char_bit])vga_rgb<=30'b1111111111_0000000000_0000000000;
else vga_rgb<=30'b0000000000_0000000000_0000000000;
10'd171:
if(char_line0a[char_bit])vga_rgb<=30'b1111111111_0000000000_0000000000;
else vga_rgb<=30'b0000000000_0000000000_0000000000;
10'd172:
if(char_line0b[char_bit])vga_rgb<=30'b1111111111_0000000000_0000000000;
else vga_rgb<=30'b0000000000_0000000000_0000000000;
10'd173:
if(char_line0c[char_bit])vga_rgb<=30'b1111111111_0000000000_0000000000;
else vga_rgb<=30'b0000000000_0000000000_0000000000;
10'd174:
if(char_line0d[char_bit])vga_rgb<=30'b1111111111_0000000000_0000000000;
else vga_rgb<=30'b0000000000_0000000000_0000000000;
10'd175:
if(char_line0e[char_bit])vga_rgb<=30'b1111111111_0000000000_0000000000;
else vga_rgb<=30'b0000000000_0000000000_0000000000;
10'd176:
if(char_line0f[char_bit])vga_rgb<=30'b1111111111_0000000000_0000000000;
else vga_rgb<=30'b0000000000_0000000000_0000000000;
10'd177:
if(char_line10[char_bit])vga_rgb<=30'b1111111111_0000000000_0000000000;
else vga_rgb<=30'b0000000000_0000000000_0000000000;
10'd178:
if(char_line11[char_bit])vga_rgb<=30'b1111111111_0000000000_0000000000;
else vga_rgb<=30'b0000000000_0000000000_0000000000;
10'd179:
if(char_line12[char_bit])vga_rgb<=30'b1111111111_0000000000_0000000000;
else vga_rgb<=30'b0000000000_0000000000_0000000000;
10'd180:
if(char_line13[char_bit])vga_rgb<=30'b1111111111_0000000000_0000000000;
else vga_rgb<=30'b0000000000_0000000000_0000000000;
10'd181:
if(char_line14[char_bit])vga_rgb<=30'b1111111111_0000000000_0000000000;
else vga_rgb<=30'b0000000000_0000000000_0000000000;
10'd182:
if(char_line15[char_bit])vga_rgb<=30'b1111111111_0000000000_0000000000;
else vga_rgb<=30'b0000000000_0000000000_0000000000;
10'd183:
if(char_line16[char_bit])vga_rgb<=30'b1111111111_0000000000_0000000000;
else vga_rgb<=30'b0000000000_0000000000_0000000000;
10'd184:
if(char_line17[char_bit])vga_rgb<=30'b1111111111_0000000000_0000000000;
else vga_rgb<=30'b0000000000_0000000000_0000000000;
10'd185:
if(char_line18[char_bit])vga_rgb<=30'b1111111111_0000000000_0000000000;
else vga_rgb<=30'b0000000000_0000000000_0000000000;
10'd186:
if(char_line19[char_bit])vga_rgb<=30'b1111111111_0000000000_0000000000;
else vga_rgb<=30'b0000000000_0000000000_0000000000;
10'd187:
if(char_line1a[char_bit])vga_rgb<=30'b1111111111_0000000000_0000000000;
else vga_rgb<=30'b0000000000_0000000000_0000000000;
10'd188:
if(char_line1b[char_bit])vga_rgb<=30'b1111111111_0000000000_0000000000;
else vga_rgb<=30'b0000000000_0000000000_0000000000;
10'd189:
if(char_line1c[char_bit])vga_rgb<=30'b1111111111_0000000000_0000000000;
else vga_rgb<=30'b0000000000_0000000000_0000000000;
10'd190:
if(char_line1d[char_bit])vga_rgb<=30'b1111111111_0000000000_0000000000;
else vga_rgb<=30'b0000000000_0000000000_0000000000;
10'd191:
if(char_line1e[char_bit])vga_rgb<=30'b1111111111_0000000000_0000000000;
else vga_rgb<=30'b0000000000_0000000000_0000000000;
10'd192:
if(char_line1f[char_bit])vga_rgb<=30'b1111111111_0000000000_0000000000;
else vga_rgb<=30'b0000000000_0000000000_0000000000;
default:vga_rgb<=30'h0000000000; //默认颜色黑色
endcase
end
else vga_rgb<=30'h000000000; //否则黑色
assign VGA_R=vga_rgb[23:16];
assign VGA_G=vga_rgb[15:8];
assign VGA_B=vga_rgb[7:0];
endmodule
注意：模块名需要和文件名保持一致，否则会报错。
2.开始分析编译
点击这个start analysis按钮。
点击start compilation按钮，成功之后会生成一个.sof的文件
3.下载验证
3.1程序烧入设置
点击programmer按钮，进行程序的烧入设置
进行hardware设置
点击add file按钮，加入之前编译生成的.sof文件
3.2开发板VGA端口连接
最后点击Start即可烧入程序
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