获取程序运行时间

RDTSC汇编指令用于程序的精确定时。原理是CPU从上电开始，其内部一个64位计数器就会记录下CPU所经过的周期数，RDTSC指令可以读取该计数器到寄存器EDX:EAX中。理论上计数精度可以达到纳秒级别。周期数/CPU主频=CPU通电以来的执行秒数。使用两次RDTSC，把两次的结果相减，得到“间隔周期数”，间隔周期数/CPU主频=CPU执行这两条指令间的秒数。

 

下面是RDTSC的一个简单应用实例：

 

static __inline __int64 read_tsc()

{

    __int64 time_collected;

    unsigned int ts1, ts2;

 

    __asm{

      rdtsc

        mov ts1, eax

        mov ts2, edx

    }

 

    time_collected = ((__int64) ts2 << 32) | ((__int64) ts1);

 

    return time_collected;

}

 

void RDTSC_test()

{

    double run_time;

    unsigned int start_time, end_time, i, j;

    

    start_time = (unsigned int)read_tsc();

 

    for(i = 0; i < 100000; i++)

    {

j = i * i;

    }

    

    end_time = (unsigned int)read_tsc();

    

    run_time = (end_time - start_time) * 1.0 / 1000000;

 

    printf("Run time: %f M cycle./n", run_time);

}

 

 

 

 

以下内如引用intel指令手册。

 

//引用开始

   

  RDTSC—Read Time-Stamp Counter

 

  Opcode        Instruction              Description

  0F 31         RDTSC Read time-stamp    counter into EDX:EAX

  

  Description

Loads the current value of the processor’s time-stamp counter into the EDX:EAX registers. 

 

The

time-stamp counter is contained in a 64-bit MSR. The high-order 32 bits of the MSR are 

 

loaded

into the EDX register, and the low-order 32 bits are loaded into the EAX register. The 

 

processor

increments the time-stamp counter MSR every clock cycle and resets it to 0 whenever the

processor is reset.

The time stamp disable (TSD) flag in register CR4 restricts the use of the RDTSC 

 

instruction.

When the TSD flag is clear, the RDTSC instruction can be executed at any privilege level; 

 

when

the flag is set, the instruction can only be executed at privilege level 0. The time-stamp 

 

counter

can also be read with the RDMSR instruction, when executing at privilege level 0.

The RDTSC instruction is not a serializing instruction. Thus, it does not necessarily wait 

 

until

all previous instructions have been executed before reading the counter. Similarly, 

 

subsequent

instructions may begin execution before the read operation is performed.

This instruction was introduced into the IA-32 Architecture in the Pentium processor.

 

Operation

IF (CR4.TSD ← 0) OR ((CR4.TSD ← 1) AND (CPL=0))

    THEN

       EDX:EAX ← TimeStampCounter;

    ELSE (* CR4 is 1 and CPL is 1, 2, or 3 *)

       #GP(0)

FI;

 

Flags Affected

None.

 

 

Protected Mode Exceptions

#GP(0)         If the TSD flag in register CR4 is set and the CPL is greater than 0.

 

Real-Address Mode Exceptions

#GP            If the TSD flag in register CR4 is set.

 

Virtual-8086 Mode Exceptions

#GP(0)         If the TSD flag in register CR4 is set.