pcie posted write

To know about PCIe Posted Transactions, you have to understand what a “posted write” is for legacy PCI, and what a legacy PCI read is.

For a legacy PCI read, and indeed reads on most busses, the CPU sends out a read command and the read address then waits for the device to respond with the data and a “Done” signal of some kind. Basically is is a Command and Response type thing.

Normal writes on a legacy PCI bus, and many other busses, is similar except that the command is the write signal + address + data and the response is just a “done”. The problem with this is that for many systems the “done” is not needed and just takes time. If the peripheral you’re writing to can accept writes at full speed then the done is not at all needed.

A “posted write” is a write that does not wait for a “done”. The CPU assumes that the write cycle will complete with zero wait states, and so doesn’t wait for the done. This speeds up writes considerably. For starters, it doesn’t have to wait for the done response, but it also allows for better pipelining of the datapath without much performance penalty.

In PCIe land all writes are posted. But PCIe calls them “posted transactions” because there are many types of writes (memory writes, I/O writes, configuration writes, etc.). There are also a couple of other transactions that don’t have a response.

The reason why all writes are posted is because the serial and packet based nature of PCIe makes the “response” super slow. It is common for a single word read to take several microseconds to complete. So, even though the bus is running at 2.5 gigabits/second you could only get about 4 megabytes/second if doing single word reads. Change that to single word posted writes and the bandwidth will go up to around 60 megabytes/second. Change to multi-word posted writes and you’re up to about 250 megabytes/second.

There is no such thing as a posted read, on any bus, because all reads require a response (a.k.a. the data you’re reading).

就是一个优化，大脑干得快，没必要全等你设备做完。 反过来就容易理解nonposted了

https://paritycheck.wordpress.com/2008/01/13/pcie-posted-vs-non-posted-transactions/