前言:本节主要讲互补输出的步长设定问题,同时引入了一个重要的参数COM,这个再诸多STM32的手册里面都过于分散,在本文有一个比较完备的小结:
When complementary outputs are used on a channel, preload bits are available on the OCxM, CCxE and CCxNE bits.
互补输出主要由以下三个可以预设的设定决定:
1 OC1M,
OC1通道的输出模式,首先有OC1REF的模式决定,OC1REF会接到OC1 、OC1N
然后,在OC1这里进行第二次设置,这里的设置又包括比较复杂的一组设定,有一个表:
COM:(COM COMMUTATION交换 EVENT)or (Capture/Compare control update)
COM的引入:
提到COM之前,我们先看:定时器的控制寄存器2,里面的CCPC,CCUS控制位
TIM1 and TIM8 control register 2 (TIMx_CR2)
这里控制寄存器的CCPC位,决定了CCP 的 Preloaded的使能,这里定义了COM的2种出现的形式:
(COMG bit set or rising edge detected on TRGI, depending on the CCUS bit).
而CCUS里面的定义,则是对上述使能做更新的选择:
事件产生寄存器
TIM1 and TIM8 event generation register (TIMx_EGR)
也就是COMG
Bit 5 COMG: Capture/Compare control update generation
1: When CCPC bit is set, it allows to update CCxE, CCxNE and OCxM bits
CCPC预设值使能后,COM的相关使能位可以通过预设先设定好,而这三个通道恰恰就是决定了互补的输出波形,这些预设值在COM的EVENT的时候给到实际的shadow寄存器。
The preload bits are transferred to the shadow bits at the COM commutation event. The user can thus program in advance (提前预设)the configuration for the next step and change the configuration of all the channels at the same time.
COM can be generated by software by setting the COM bit in the TIMx_EGR register or by hardware (on TRGI rising edge).
COM 的EVENT设定值可以是软件设定TIMx_EGR来实现,也可以 由硬件上升沿触发决定。
EVENT发生的时候,会更新状态寄存器
A flag is set when the COM event occurs (COMIF bit in the TIMx_SR register),
Bit 5 COMIF: COM interrupt flag
This flag is set by hardware on COM event (when Capture/compare Control bits - CCxE, CCxNE, OCxM - have been updated). It is cleared by software.
0: No COM event occurred.
1: COM interrupt pending.
同时也可以产生中断:
which can generate an interrupt (if the COMIE bit is set in the TIMx_DIER register) or a DMA request
(if the COMDE bit is set in the TIMx_DIER register).
Bit 5 COMIE: COM interrupt enable
0: COM interrupt disabled
1: COM interrupt enabled
Figure 91 describes the behavior of the OCx and OCxN outputs when a COM event occurs,
in 3 different examples of programmed configurations.
Example 1:
1 CO1M = 100 : OC1REF 为低电平 预设值
2 CC1NE = 0, 那么 OCXN 的互补输出被关闭了
3 CC1E = 1,OC1 的输出依据OCXREF的输出,再结合MIX的Table组合:
当COM = 1 ,也就是,TIMx_EGR 的 COMG 更新的时候
COM EVENT 事件产生,同时更新设置,那么OC1REF force low,OC1的输出被拉倒低电平
Example 2:
和例子1不同的是,CC1NE的值设为1,这样互补通道打开,同时OC1M设为1,那么OC1REF 被Force to High 给到OC1
如果之前OC1REF就是高,那么他是不变的,互补输出通道则由原来的LOW改为和OC1REF一致为高,
所有的这些变动,都是在COM TO 1的时候生效,这个和SAMPLE1 一致,
仔细看这个例子,前面互补输出的通道都是正常的,到COM TO 1 触发之后,OC1N的通道就一直未低电平了,DISABLE。
该例子给出了OC1REF的两个互补波形,而且还带死区的Delay
参考:
STM32 - 定时器的设定 - 基础- 02 - Capture/compare channels 和相关设置寄存器
https://mp.csdn.net/postedit/102083981