2021-06-30

1.实验目的：
下载Quartur ii软件和modlsim并进行联合仿真。

2.实验内容：
参照哔哩哔哩中教程的代码，然后用quartus ii和modlsim进行联合仿真
3.实验原理：按照视频上的内容，书写和运行代码，完成联合仿真操作

4实验工具：
pc机和Quartur ii软件和modlsim软件。

5.实验截图：

在这里插入图片描述

6.实验代码：module BtoG1 (data_in,en,data_out,err);
input [3:0] data_in;
input en;
output [3:0] data_out;
output err;
reg [3:0] data_out;
reg err;
always @(data_in or en)
begin
if(en ==1)
begin
data_out [0] = (data_in [0]^data_in [1]);
data_out [1] =(data_in [1]^data_in [2]);
data_out [2]=(data_in [2]^data_in[3]);
data_out[3]=data_in[3];
err=0;
end
else
begin
data_out=4’b1111;
err=1;
end
end
endmodule

module BtoG2 (data_in,en,data_out,err);
input [3:0] data_in;
input en;
output [3:0] data_out;
output err;
reg [3:0] data_out;
reg err;
always @(data_in or en)
begin
if(en ==1)
begin
case(data_in)
4’b0000:data_out=4’b0000;
4’b0001:data_out=4’b0001;
4’b0010:data_out=4’b0011;
4’b0011:data_out=4’b0010;
4’b0100:data_out=4’b0110;
4’b0101:data_out=4’b0111;
4’b0110:data_out=4’b0101;
4’b0111:data_out=4’b0100;
4’b1000:data_out=4’b1100;
4’b1001:data_out=4’b1101;
4’b1010:data_out=4’b1111;
4’b1011:data_out=4’b1110;
4’b1100:data_out=4’b1010;
4’b1101:data_out=4’b1011;
4’b1110:data_out=4’b1001;
4’b1111:data_out=4’b1000;
default:data_out=4’b1111;
endcase
err=0;
end
else
begin
data_out=4’b1111;
err=1;
end
end
endmodule

module BtoD (data_in,en,data_out,err);
input [3:0] data_in;
input en;
output [3:0] data_out;
output err;
reg [7:0] data_out;
reg err;

always @(data_in or en)
begin
if(en ==1)
begin
case(data_in)
4’b0000:data_out=8’b0000_0000;
4’b0001:data_out=8’b0000_0001;
4’b0010:data_out=8’b0000_0010;
4’b0011:data_out=8’b0000_0011;
4’b0100:data_out=8’b0000_0100;
4’b0101:data_out=8’b0000_0101;
4’b0110:data_out=8’b0000_0110;
4’b0111:data_out=8’b0000_0111;
4’b1000:data_out=8’b0000_1000;
4’b1001:data_out=8’b0000_1001;
4’b1010:data_out=8’b0001_0000;
4’b1011:data_out=8’b0001_0001;
4’b1100:data_out=8’b0001_0010;
4’b1101:data_out=8’b0001_0011;
4’b1110:data_out=8’b0001_0100;
4’b1111:data_out=8’b0001_0101;
default:data_out=8’b1111_1111;
endcase
err=0;
end
else
begin
data_out=4’b1111;
err=1;
end
end
endmodule
7.实验视频：
https://v.qq.com/x/page/j3256i64kqt.html