用有限状态机（FSM）在BASYS3开发板实现流水灯

一、实验所需环境

1、Basys3开发板；
2、Vivado2017.4开发环境；
3、VHDL硬件描述语言。

二、相关代码

1、代码

library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
use IEEE.STD_LOGIC_UNSIGNED.ALL;

entity running_led is
    Port ( clk     : in  STD_LOGIC;
           rst     : in  STD_LOGIC;
           q       : out STD_LOGIC_VECTOR (7 downto 0));     
end entity running_led;

architecture Behavioral of running_led is
  type states is(s0,s1,s2,s3);                          --定义四种模式
  signal present   : states:=s0;
  signal nex_state : states;  
  signal q_tmp     : std_logic_vector(7 downto 0):="10000000"; 
  signal count     : std_logic_vector(2 downto 0):="000";  
  signal cnt_f     : std_logic_vector(25 downto 0):=(others=>'0');
  signal clk_f     : std_logic:='0';  
begin
--clk=100MHZ,clk_f=2HZ,0.5s
  cnt_f_gen:process(clk)
  begin
    if(clk'event and clk='1') then
      if(cnt_f=24999999)then               --计数个数N=(clk/clk_f)/2-1
        cnt_f<=(others=>'0');
      else
        cnt_f<=cnt_f+1;        
      end if;
    end if;
  end process;
  
  clk_f_gen:process(clk)
  begin
      if(clk'event and clk='1') then
        if(cnt_f=0) then
          clk_f<=not clk