u-boot
load -r -b 0x800000 -h 192.168.9.30 u-boot.bin
exec 0x800000
1.3.1
1、不用CFI驱动
2、cpu\ixp\npe\IxNpeDl.c
static IxNpeDlNpeState ixNpeDlNpeState[IX_NPEDL_NPEID_MAX] =
{
{FALSE, {IX_NPEDL_NPEID_MAX, 0, 0, 0}},
{TRUE, {IX_NPEDL_NPEID_NPEA, 0, 2, 0}},
{TRUE, {IX_NPEDL_NPEID_NPEB, 0, 2, 0}}
};
IxNpeMicrocode.h
//#undef IX_NPEDL_NPEIMAGE_NPEB_ETH
//#undef IX_NPEDL_NPEIMAGE_NPEC_ETH
npe.c
npe_initialize
IX_FEATURE_CTRL_SILICON_STEPPING_MASK
IX_FEATURE_CTRL_SILICON_TYPE_A0 0
IX_FEATURE_CTRL_SILICON_TYPE_B0 1
IX_FEATURE_CTRL_SILICON_TYPE_C0 2
3 flash.c
#define INTEL_ID_28F128P30T 0x88188818 /* 128M = 64K x 255 + 32k x 4 */
0xC800 4000 0x00000000 General-Purpose Data Output Register (GPOUTR)
0xC800 4004 0x00007FFF General-Purpose Output Enable Register (GPOER)
0xC800 4008 0x00000000 GPIO Input Register (GPINR)
0xC800 400C 0x00000000 General-Purpose Input Status Register (GPISR)
0xC800 4010 General-Purpose Interrupt Type Register1 (GPIT1R)
0xC800 4014 General-Purpose Interrupt Type Register2 (GPIT2R)
0xC800 4018 General-Purpose Clock Register (GPCLKR)
0x C800 5014 Watch-Dog Counter
0x C800 5018 Watch-Dog Enable Register
0x C800 501C Watch-Dog Key Register
2.6.12
struct scatterlist {
struct page *page; /* buffer page */
unsigned int offset; /* buffer offset */
dma_addr_t dma_address; /* dma address */
unsigned int length; /* length */
char *__address; /* for set_dma_addr */
};
2.6.28
struct scatterlist {
#ifdef CONFIG_DEBUG_SG
unsigned long sg_magic;
#endif
unsigned long page_link;
unsigned int offset; /* buffer offset */
dma_addr_t dma_address; /* dma address */
unsigned int length; /* length */
};
0xCC000000 SDR_CONFIG 0x00000010
0xCC000004 SDR_REFRESH 0x00000384
0xCC000008 SDR_IR 0x00000000
0XC4000000 EXP_TIMING_CS0 0xBFFF3C4x
0XC4000004 EXP_TIMING_CS1 0x00000000
0XC4000008 EXP_TIMING_CS2 0x00000000
0XC400000C EXP_TIMING_CS3 0x00000000
0XC4000010 EXP_TIMING_CS4 0x00000000
0XC4000014 EXP_TIMING_CS5 0x00000000
0XC4000018 EXP_TIMING_CS6 0x00000000
0XC400001C EXP_TIMING_CS7 0x00000000
0XC4000020 EXP_CNFG0 0x8XXXXXXX
0XC4000024 EXP_CNFG1 0x00000000
20090702
Core#0>i
Core number : 0
Core state : debug mode (ARM)
Debug entry cause : Vector Trap (UNDEFINED)
Current PC : 0x00000050
Current CPSR : 0x680000d3 (Supervisor)
Core#0>
Core number : 0
Core state : debug mode (ARM)
Debug entry cause : Vector Trap (UNDEFINED)
Current PC : 0x00000050
Current CPSR : 0x080000d3 (Supervisor)
OST_TS 0xC8005000 0x00000000
OST_STATUS 0xC8005020 0x00000000
0: warm_reset
1:
2:
3:
4
about 21:30 tftp and cui can work with bdi2000
1.3.4
不用PCI
//#define CONFIG_CMD_PCI
//#define CONFIG_PCI
//#define CONFIG_EEPRO100
1.2.0
//#define CONFIG_CMD_PCI
//#define CONFIG_PCI
//#define CONFIG_EEPRO100
//#define CFG_FLASH_CFI /* The flash is CFI compatible */
//#define CFG_FLASH_CFI_DRIVER /* Use common CFI driver */
20090703
确认是PCI初始化时GPIO13把watchdog激活了。
load -r -b 0x800000 -h 192.168.9.30 u-boot.bin
exec 0x800000
1.3.1
1、不用CFI驱动
2、cpu\ixp\npe\IxNpeDl.c
static IxNpeDlNpeState ixNpeDlNpeState[IX_NPEDL_NPEID_MAX] =
{
{FALSE, {IX_NPEDL_NPEID_MAX, 0, 0, 0}},
{TRUE, {IX_NPEDL_NPEID_NPEA, 0, 2, 0}},
{TRUE, {IX_NPEDL_NPEID_NPEB, 0, 2, 0}}
};
IxNpeMicrocode.h
//#undef IX_NPEDL_NPEIMAGE_NPEB_ETH
//#undef IX_NPEDL_NPEIMAGE_NPEC_ETH
npe.c
npe_initialize
IX_FEATURE_CTRL_SILICON_STEPPING_MASK
IX_FEATURE_CTRL_SILICON_TYPE_A0 0
IX_FEATURE_CTRL_SILICON_TYPE_B0 1
IX_FEATURE_CTRL_SILICON_TYPE_C0 2
3 flash.c
#define INTEL_ID_28F128P30T 0x88188818 /* 128M = 64K x 255 + 32k x 4 */
0xC800 4000 0x00000000 General-Purpose Data Output Register (GPOUTR)
0xC800 4004 0x00007FFF General-Purpose Output Enable Register (GPOER)
0xC800 4008 0x00000000 GPIO Input Register (GPINR)
0xC800 400C 0x00000000 General-Purpose Input Status Register (GPISR)
0xC800 4010 General-Purpose Interrupt Type Register1 (GPIT1R)
0xC800 4014 General-Purpose Interrupt Type Register2 (GPIT2R)
0xC800 4018 General-Purpose Clock Register (GPCLKR)
0x C800 5014 Watch-Dog Counter
0x C800 5018 Watch-Dog Enable Register
0x C800 501C Watch-Dog Key Register
2.6.12
struct scatterlist {
struct page *page; /* buffer page */
unsigned int offset; /* buffer offset */
dma_addr_t dma_address; /* dma address */
unsigned int length; /* length */
char *__address; /* for set_dma_addr */
};
2.6.28
struct scatterlist {
#ifdef CONFIG_DEBUG_SG
unsigned long sg_magic;
#endif
unsigned long page_link;
unsigned int offset; /* buffer offset */
dma_addr_t dma_address; /* dma address */
unsigned int length; /* length */
};
0xCC000000 SDR_CONFIG 0x00000010
0xCC000004 SDR_REFRESH 0x00000384
0xCC000008 SDR_IR 0x00000000
0XC4000000 EXP_TIMING_CS0 0xBFFF3C4x
0XC4000004 EXP_TIMING_CS1 0x00000000
0XC4000008 EXP_TIMING_CS2 0x00000000
0XC400000C EXP_TIMING_CS3 0x00000000
0XC4000010 EXP_TIMING_CS4 0x00000000
0XC4000014 EXP_TIMING_CS5 0x00000000
0XC4000018 EXP_TIMING_CS6 0x00000000
0XC400001C EXP_TIMING_CS7 0x00000000
0XC4000020 EXP_CNFG0 0x8XXXXXXX
0XC4000024 EXP_CNFG1 0x00000000
20090702
Core#0>i
Core number : 0
Core state : debug mode (ARM)
Debug entry cause : Vector Trap (UNDEFINED)
Current PC : 0x00000050
Current CPSR : 0x680000d3 (Supervisor)
Core#0>
Core number : 0
Core state : debug mode (ARM)
Debug entry cause : Vector Trap (UNDEFINED)
Current PC : 0x00000050
Current CPSR : 0x080000d3 (Supervisor)
OST_TS 0xC8005000 0x00000000
OST_STATUS 0xC8005020 0x00000000
0: warm_reset
1:
2:
3:
4
about 21:30 tftp and cui can work with bdi2000
1.3.4
不用PCI
//#define CONFIG_CMD_PCI
//#define CONFIG_PCI
//#define CONFIG_EEPRO100
1.2.0
//#define CONFIG_CMD_PCI
//#define CONFIG_PCI
//#define CONFIG_EEPRO100
//#define CFG_FLASH_CFI /* The flash is CFI compatible */
//#define CFG_FLASH_CFI_DRIVER /* Use common CFI driver */
20090703
确认是PCI初始化时GPIO13把watchdog激活了。