1. 先根据下面的信息,画出了一个简单的示意图。 (应该是32个设备,0-31,图里写错了)
2. 设备扫描打印的信息。(注:内部标注的中文不一定正确,因为我暂时也在摸索)
setting up 1 bus
2022-03-15 pci_roots = 1
2022-03-15 _pci_scan_dev bus = 0 device = 0 initialise = 1
PCI bus 0 slot 0: probe...2222completed
PCI bus 0 slot 1: probe...2222completed
PCI bus 0 slot 2: probe...2222completed //表示是空的,没有连接设备PCI bus 0 slot 3: probe...2222completed
03-16 dev = 0x8f7ff538 tag = 1800
PCI bus 0 slot 3/0: vendor/product: 0x0014/0x7a03 (network, ethernet, interface: 0x00, revision: 0x00)
2022-03-16 bus = 0 device = 3 func = 0
2022-03-16-else? bus = 0 device = 3 func = 0
2022-03-15 bus = 0 3 0
03-16 reg 0x10 = 0xffff8004
PCI bus 0 slot 3/0: reg 0x10 = 0xffff8004
03-16 memspace size = 0x8000 reg = 0x10 //网卡设备只请求了内存空间
03-16 reg 0x18 = 0x0
03-16 reg 0x1c = 0x0
03-16 reg 0x20 = 0x0
03-16 reg 0x24 = 0x0
03-16 end for
03-16-2 reg 0x30 = 0x003-16 dev = 0x8f7ff538 tag = 1900 //一个设备上有两个网卡,分别在功能0上和功能1上
PCI bus 0 slot 3/1: vendor/product: 0x0014/0x7a03 (network, ethernet, interface: 0x00, revision: 0x00)
2022-03-16 bus = 0 device = 3 func = 1
2022-03-16-else? bus = 0 device = 3 func = 1
2022-03-15 bus = 0 3 1
03-16 reg 0x10 = 0xffff8004
PCI bus 0 slot 3/1: reg 0x10 = 0xffff8004
03-16 memspace size = 0x8000 reg = 0x10 //网卡设备只请求了内存空间
03-16 reg 0x18 = 0x0
03-16 reg 0x1c = 0x0
03-16 reg 0x20 = 0x0
03-16 reg 0x24 = 0x0
03-16 end for
03-16-2 reg 0x30 = 0x0PCI bus 0 slot 4: probe...2222completed //usb有3个,同一个设备,占用3个功能
03-16 dev = 0x8f7ff538 tag = 2000
PCI bus 0 slot 4/0: vendor/product: 0x0014/0x7a04 (serialbus, USB, interface: 0x80, revision: 0x00)
2022-03-16 bus = 0 device = 4 func = 0
2022-03-16-else? bus = 0 device = 4 func = 0
2022-03-15 bus = 0 4 0
03-16 reg 0x10 = 0xfffc0004
PCI bus 0 slot 4/0: reg 0x10 = 0xfffc0004
03-16 memspace size = 0x40000 reg = 0x10 //usb设备只请求了内存空间
03-16 reg 0x18 = 0x0
03-16 reg 0x1c = 0x0
03-16 reg 0x20 = 0x0
03-16 reg 0x24 = 0x0
03-16 end for
03-16-2 reg 0x30 = 0x003-16 dev = 0x8f7ff538 tag = 2100
PCI bus 0 slot 4/1: vendor/product: 0x0014/0x7a14 (serialbus, USB, interface: 0x20, revision: 0x00)
2022-03-16 bus = 0 device = 4 func = 1
2022-03-16-else? bus = 0 device = 4 func = 1
2022-03-15 bus = 0 4 1
03-16 reg 0x10 = 0xffff8004
PCI bus 0 slot 4/1: reg 0x10 = 0xffff8004
03-16 memspace size = 0x8000 reg = 0x10 //usb设备只请求了内存空间,大小好像变了
03-16 reg 0x18 = 0x0
03-16 reg 0x1c = 0x0
03-16 reg 0x20 = 0x0
03-16 reg 0x24 = 0x0
03-16 end for
03-16-2 reg 0x30 = 0x003-16 dev = 0x8f7ff538 tag = 2200
PCI bus 0 slot 4/2: vendor/product: 0x0014/0x7a24 (serialbus, USB, interface: 0x10, revision: 0x00)
2022-03-16 bus = 0 device = 4 func = 2
2022-03-16-else? bus = 0 device = 4 func = 2
2022-03-15 bus = 0 4 2
03-16 reg 0x10 = 0xffff8004
PCI bus 0 slot 4/2: reg 0x10 = 0xffff8004
03-16 memspace size = 0x8000 reg = 0x10 //usb设备只请求了内存空间
03-16 reg 0x18 = 0x0
03-16 reg 0x1c = 0x0
03-16 reg 0x20 = 0x0
03-16 reg 0x24 = 0x0
03-16 end for
03-16-2 reg 0x30 = 0x0PCI bus 0 slot 5: probe...2222completed
03-16 dev = 0x8f7ff538 tag = 2800 //显卡设备
PCI bus 0 slot 5/0: vendor/product: 0x0014/0x7a05 (display, subclass: 0x02, interface: 0x00, revision: 0x00)
2022-03-16 bus = 0 device = 5 func = 0
2022-03-16-else? bus = 0 device = 5 func = 0
2022-03-15 bus = 0 5 0
03-16 reg 0x10 = 0xfffc0004
PCI bus 0 slot 5/0: reg 0x10 = 0xfffc0004
03-16 memspace size = 0x40000 reg = 0x10 //显卡设备请求内存空间
03-16 reg 0x18 = 0x0
03-16 reg 0x1c = 0x0
03-16 reg 0x20 = 0x0
03-16 reg 0x24 = 0x0
03-16 end for
03-16-2 reg 0x30 = 0x0
PCI bus 0 slot 6: probe...2222completed03-16 dev = 0x8f7ff538 tag = 3000 //VGA显卡设备
PCI bus 0 slot 6/0: vendor/product: 0x0014/0x7a06 (display, VGA, interface: 0x00, revision: 0x00)
2022-03-16 bus = 0 device = 6 func = 0
2022-03-16-else? bus = 0 device = 6 func = 0
2022-03-15 bus = 0 6 0
03-16 reg 0x10 = 0xffff0004
PCI bus 0 slot 6/0: reg 0x10 = 0xffff0004
03-16 memspace size = 0x10000 reg = 0x10 //VGA显卡设备请求内存空间
03-16 reg 0x18 = 0x0
03-16 reg 0x1c = 0x0
03-16 reg 0x20 = 0x0
03-16 reg 0x24 = 0x0
03-16 end for
03-16-2 reg 0x30 = 0x0PCI bus 0 slot 7: probe...2222completed
03-16 dev = 0x8f7ff538 tag = 3800 //多媒体设备
PCI bus 0 slot 7/0: vendor/product: 0x0014/0x7a07 (multimedia, subclass: 0x03, interface: 0x00, revision: 0x00)
2022-03-16 bus = 0 device = 7 func = 0
2022-03-16-else? bus = 0 device = 7 func = 0
2022-03-15 bus = 0 7 0
03-16 reg 0x10 = 0xffff0004
PCI bus 0 slot 7/0: reg 0x10 = 0xffff0004
03-16 memspace size = 0x10000 reg = 0x10 //多媒体设备请求内存空间
03-16 reg 0x18 = 0x0
03-16 reg 0x1c = 0x0
03-16 reg 0x20 = 0x0
03-16 reg 0x24 = 0x0
03-16 end for
03-16-2 reg 0x30 = 0x0PCI bus 0 slot 8: probe...2222completed
03-16 dev = 0x8f7ff538 tag = 4000 //磁盘存储设备
PCI bus 0 slot 8/0: vendor/product: 0x0014/0x7a08 (mass storage, subclass: 0x06, interface: 0x01, revision: 0x00)
2022-03-16 bus = 0 device = 8 func = 0
2022-03-16-else? bus = 0 device = 8 func = 0
2022-03-15 bus = 0 8 0
03-16 reg 0x10 = 0xffff0004
PCI bus 0 slot 8/0: reg 0x10 = 0xffff0004
03-16 memspace size = 0x10000 reg = 0x10 //磁盘存储设备请求内存空间
03-16 reg 0x18 = 0x0
03-16 reg 0x1c = 0x0
03-16 reg 0x20 = 0x0
03-16 reg 0x24 = 0x0
03-16 end for
03-16-2 reg 0x30 = 0x0PCI bus 0 slot 9: probe...2222completed
03-16 dev = 0x8f7ff538 tag = 4800 //PCI桥设备
PCI bus 0 slot 9/0: vendor/product: 0x0014/0x7a19 (bridge, PCI, interface: 0x00, revision: 0x01)
2022-03-16 bus = 0 device = 9 func = 0
2022-03-15 device is a PCI Bridge
2022-03-15 _pci_scan_dev bus = 1 device = 0 initialise = 1PCI bus 1 slot 0: probe...2222completed
03-16 dev = 0x8f7fee78 tag = 10000 //PCI桥下的设备
PCI bus 1 slot 0/0: vendor/product: 0x1c00/0x5834 (class/subclass: 0x10/0x00, interface: 0x00, revision: 0x10)
2022-03-16 bus = 1 device = 0 func = 0
2022-03-16-else? bus = 1 device = 0 func = 0
2022-03-15 bus = 1 0 0
03-16 reg 0x10 = 0xffffff01
PCI bus 1 slot 0/0: reg 0x10 = 0xffffff01
03-16 iospace size = 0x100 reg = 0x10 //请求IO空间
03-16 reg 0x14 = 0xffff8008
PCI bus 1 slot 0/0: reg 0x14 = 0xffff8008
03-16 memspace size = 0x8000 reg = 0x14 //请求内存空间
03-16 reg 0x18 = 0xfffffffd
PCI bus 1 slot 0/0: reg 0x18 = 0xfffffffd
03-16 iospace size = 0x8 reg = 0x18 //请求IO空间2
03-16 reg 0x1c = 0x0
03-16 reg 0x20 = 0x0
03-16 reg 0x24 = 0x0
03-16 end for
03-16-2 reg 0x30 = 0xffff8000
PCI bus 1 slot 0/0: reg 0x30 = 0xffff8000PCI bus 1 slot 1: probe...2222completed //桥下其他扫描,都没有挂设备
PCI bus 1 slot 2: probe...2222completed
PCI bus 1 slot 3: probe...2222completed
PCI bus 1 slot 4: probe...2222completed
PCI bus 1 slot 5: probe...2222completed
PCI bus 1 slot 6: probe...2222completed
PCI bus 1 slot 7: probe...2222completed
PCI bus 1 slot 8: probe...2222completed
PCI bus 1 slot 9: probe...2222completed
PCI bus 1 slot 10: probe...2222completed
PCI bus 1 slot 11: probe...2222completed
PCI bus 1 slot 12: probe...2222completed
PCI bus 1 slot 13: probe...2222completed
PCI bus 1 slot 14: probe...2222completed
PCI bus 1 slot 15: probe...2222completed
PCI bus 1 slot 16: probe...2222completed
PCI bus 1 slot 17: probe...2222completed
PCI bus 1 slot 18: probe...2222completed
PCI bus 1 slot 19: probe...2222completed
PCI bus 1 slot 20: probe...2222completed
PCI bus 1 slot 21: probe...2222completed
PCI bus 1 slot 22: probe...2222completed
PCI bus 1 slot 23: probe...2222completed
PCI bus 1 slot 24: probe...2222completed
PCI bus 1 slot 25: probe...2222completed
PCI bus 1 slot 26: probe...2222completed
PCI bus 1 slot 27: probe...2222completed
PCI bus 1 slot 28: probe...2222completed
PCI bus 1 slot 29: probe...2222completed
PCI bus 1 slot 30: probe...2222completed
PCI bus 1 slot 31: probe...2222completed2022-03-16-else? bus = 0 device = 9 func = 0
2022-03-15 bus = 0 9 0
03-16 reg 0x10 = 0xfffff004
PCI bus 0 slot 9/0: reg 0x10 = 0xfffff004
03-16 memspace size = 0x1000 reg = 0x10 //pci桥请求的空间,似乎跟桥下设备无关
03-16 end for
03-16-2 reg 0x38 = 0x0PCI bus 0 slot 10: probe...2222completed
03-16 dev = 0x8f7ff538 tag = 5000 //PCI桥设备
PCI bus 0 slot 10/0: vendor/product: 0x0014/0x7a09 (bridge, PCI, interface: 0x00, revision: 0x01)
2022-03-16 bus = 0 device = 10 func = 0
2022-03-15 device is a PCI Bridge2022-03-15 _pci_scan_dev bus = 4 device = 0 initialise = 1
PCI bus 4 slot 0: probe...2222completed //无任何设备
PCI bus 4 slot 1: probe...2222completed
PCI bus 4 slot 2: probe...2222completed
PCI bus 4 slot 3: probe...2222completed
PCI bus 4 slot 4: probe...2222completed
PCI bus 4 slot 5: probe...2222completed
PCI bus 4 slot 6: probe...2222completed
PCI bus 4 slot 7: probe...2222completed
PCI bus 4 slot 8: probe...2222completed
PCI bus 4 slot 9: probe...2222completed
PCI bus 4 slot 10: probe...2222completed
PCI bus 4 slot 11: probe...2222completed
PCI bus 4 slot 12: probe...2222completed
PCI bus 4 slot 13: probe...2222completed
PCI bus 4 slot 14: probe...2222completed
PCI bus 4 slot 15: probe...2222completed
PCI bus 4 slot 16: probe...2222completed
PCI bus 4 slot 17: probe...2222completed
PCI bus 4 slot 18: probe...2222completed
PCI bus 4 slot 19: probe...2222completed
PCI bus 4 slot 20: probe...2222completed
PCI bus 4 slot 21: probe...2222completed
PCI bus 4 slot 22: probe...2222completed
PCI bus 4 slot 23: probe...2222completed
PCI bus 4 slot 24: probe...2222completed
PCI bus 4 slot 25: probe...2222completed
PCI bus 4 slot 26: probe...2222completed
PCI bus 4 slot 27: probe...2222completed
PCI bus 4 slot 28: probe...2222completed
PCI bus 4 slot 29: probe...2222completed
PCI bus 4 slot 30: probe...2222completed
PCI bus 4 slot 31: probe...2222completed2022-03-16-else? bus = 0 device = 10 func = 0
2022-03-15 bus = 0 10 0
03-16 reg 0x10 = 0xfffff004
PCI bus 0 slot 10/0: reg 0x10 = 0xfffff004 //为pci桥请求空间
03-16 memspace size = 0x1000 reg = 0x10
03-16 end for
03-16-2 reg 0x38 = 0x0PCI bus 0 slot 11: probe...2222completed
03-16 dev = 0x8f7ff538 tag = 5800 //PCI桥设备
PCI bus 0 slot 11/0: vendor/product: 0x0014/0x7a09 (bridge, PCI, interface: 0x00, revision: 0x01)
2022-03-16 bus = 0 device = 11 func = 0
2022-03-15 device is a PCI Bridge2022-03-15 _pci_scan_dev bus = 8 device = 0 initialise = 1
PCI bus 8 slot 0: probe...2222completed
PCI bus 8 slot 1: probe...2222completed
PCI bus 8 slot 2: probe...2222completed
PCI bus 8 slot 3: probe...2222completed
PCI bus 8 slot 4: probe...2222completed
PCI bus 8 slot 5: probe...2222completed
PCI bus 8 slot 6: probe...2222completed
PCI bus 8 slot 7: probe...2222completed
PCI bus 8 slot 8: probe...2222completed
PCI bus 8 slot 9: probe...2222completed
PCI bus 8 slot 10: probe...2222completed
PCI bus 8 slot 11: probe...2222completed
PCI bus 8 slot 12: probe...2222completed
PCI bus 8 slot 13: probe...2222completed
PCI bus 8 slot 14: probe...2222completed
PCI bus 8 slot 15: probe...2222completed
PCI bus 8 slot 16: probe...2222completed
PCI bus 8 slot 17: probe...2222completed
PCI bus 8 slot 18: probe...2222completed
PCI bus 8 slot 19: probe...2222completed
PCI bus 8 slot 20: probe...2222completed
PCI bus 8 slot 21: probe...2222completed
PCI bus 8 slot 22: probe...2222completed
PCI bus 8 slot 23: probe...2222completed
PCI bus 8 slot 24: probe...2222completed
PCI bus 8 slot 25: probe...2222completed
PCI bus 8 slot 26: probe...2222completed
PCI bus 8 slot 27: probe...2222completed
PCI bus 8 slot 28: probe...2222completed
PCI bus 8 slot 29: probe...2222completed
PCI bus 8 slot 30: probe...2222completed
PCI bus 8 slot 31: probe...2222completed2022-03-16-else? bus = 0 device = 11 func = 0
2022-03-15 bus = 0 11 0
03-16 reg 0x10 = 0xfffff004
PCI bus 0 slot 11/0: reg 0x10 = 0xfffff004
03-16 memspace size = 0x1000 reg = 0x10 //桥空间
03-16 end for
03-16-2 reg 0x38 = 0x0PCI bus 0 slot 12: probe...2222completed
03-16 dev = 0x8f7ff538 tag = 6000 //PCI桥设备
PCI bus 0 slot 12/0: vendor/product: 0x0014/0x7a09 (bridge, PCI, interface: 0x00, revision: 0x01)
2022-03-16 bus = 0 device = 12 func = 0
2022-03-15 device is a PCI Bridge
2022-03-15 _pci_scan_dev bus = 12 device = 0 initialise = 1
PCI bus 12 slot 0: probe...2222completed
PCI bus 12 slot 1: probe...2222completed
PCI bus 12 slot 2: probe...2222completed
PCI bus 12 slot 3: probe...2222completed
PCI bus 12 slot 4: probe...2222completed
PCI bus 12 slot 5: probe...2222completed
PCI bus 12 slot 6: probe...2222completed
PCI bus 12 slot 7: probe...2222completed
PCI bus 12 slot 8: probe...2222completed
PCI bus 12 slot 9: probe...2222completed
PCI bus 12 slot 10: probe...2222completed
PCI bus 12 slot 11: probe...2222completed
PCI bus 12 slot 12: probe...2222completed
PCI bus 12 slot 13: probe...2222completed
PCI bus 12 slot 14: probe...2222completed
PCI bus 12 slot 15: probe...2222completed
PCI bus 12 slot 16: probe...2222completed
PCI bus 12 slot 17: probe...2222completed
PCI bus 12 slot 18: probe...2222completed
PCI bus 12 slot 19: probe...2222completed
PCI bus 12 slot 20: probe...2222completed
PCI bus 12 slot 21: probe...2222completed
PCI bus 12 slot 22: probe...2222completed
PCI bus 12 slot 23: probe...2222completed
PCI bus 12 slot 24: probe...2222completed
PCI bus 12 slot 25: probe...2222completed
PCI bus 12 slot 26: probe...2222completed
PCI bus 12 slot 27: probe...2222completed
PCI bus 12 slot 28: probe...2222completed
PCI bus 12 slot 29: probe...2222completed
PCI bus 12 slot 30: probe...2222completed
PCI bus 12 slot 31: probe...2222completed
2022-03-16-else? bus = 0 device = 12 func = 0
2022-03-15 bus = 0 12 0
03-16 reg 0x10 = 0xfffff004
PCI bus 0 slot 12/0: reg 0x10 = 0xfffff004
03-16 memspace size = 0x1000 reg = 0x10 //桥空间
03-16 end for
03-16-2 reg 0x38 = 0x0PCI bus 0 slot 13: probe...2222completed
03-16 dev = 0x8f7ff538 tag = 6800 //PCI桥设备
PCI bus 0 slot 13/0: vendor/product: 0x0014/0x7a19 (bridge, PCI, interface: 0x00, revision: 0x01)
2022-03-16 bus = 0 device = 13 func = 0
2022-03-15 device is a PCI Bridge2022-03-15 _pci_scan_dev bus = 16 device = 0 initialise = 1
PCI bus 16 slot 0: probe...2222completed
PCI bus 16 slot 1: probe...2222completed
PCI bus 16 slot 2: probe...2222completed
PCI bus 16 slot 3: probe...2222completed
PCI bus 16 slot 4: probe...2222completed
PCI bus 16 slot 5: probe...2222completed
PCI bus 16 slot 6: probe...2222completed
PCI bus 16 slot 7: probe...2222completed
PCI bus 16 slot 8: probe...2222completed
PCI bus 16 slot 9: probe...2222completed
PCI bus 16 slot 10: probe...2222completed
PCI bus 16 slot 11: probe...2222completed
PCI bus 16 slot 12: probe...2222completed
PCI bus 16 slot 13: probe...2222completed
PCI bus 16 slot 14: probe...2222completed
PCI bus 16 slot 15: probe...2222completed
PCI bus 16 slot 16: probe...2222completed
PCI bus 16 slot 17: probe...2222completed
PCI bus 16 slot 18: probe...2222completed
PCI bus 16 slot 19: probe...2222completed
PCI bus 16 slot 20: probe...2222completed
PCI bus 16 slot 21: probe...2222completed
PCI bus 16 slot 22: probe...2222completed
PCI bus 16 slot 23: probe...2222completed
PCI bus 16 slot 24: probe...2222completed
PCI bus 16 slot 25: probe...2222completed
PCI bus 16 slot 26: probe...2222completed
PCI bus 16 slot 27: probe...2222completed
PCI bus 16 slot 28: probe...2222completed
PCI bus 16 slot 29: probe...2222completed
PCI bus 16 slot 30: probe...2222completed
PCI bus 16 slot 31: probe...2222completed2022-03-16-else? bus = 0 device = 13 func = 0
2022-03-15 bus = 0 13 0
03-16 reg 0x10 = 0xfffff004
PCI bus 0 slot 13/0: reg 0x10 = 0xfffff004
03-16 memspace size = 0x1000 reg = 0x10 //桥空间
03-16 end for
03-16-2 reg 0x38 = 0x0PCI bus 0 slot 14: probe...2222completed
03-16 dev = 0x8f7ff538 tag = 7000 //PCI桥设备
PCI bus 0 slot 14/0: vendor/product: 0x0014/0x7a09 (bridge, PCI, interface: 0x00, revision: 0x01)
2022-03-16 bus = 0 device = 14 func = 0
2022-03-15 device is a PCI Bridge2022-03-15 _pci_scan_dev bus = 20 device = 0 initialise = 1
PCI bus 20 slot 0: probe...2222completed
PCI bus 20 slot 1: probe...2222completed
PCI bus 20 slot 2: probe...2222completed
PCI bus 20 slot 3: probe...2222completed
PCI bus 20 slot 4: probe...2222completed
PCI bus 20 slot 5: probe...2222completed
PCI bus 20 slot 6: probe...2222completed
PCI bus 20 slot 7: probe...2222completed
PCI bus 20 slot 8: probe...2222completed
PCI bus 20 slot 9: probe...2222completed
PCI bus 20 slot 10: probe...2222completed
PCI bus 20 slot 11: probe...2222completed
PCI bus 20 slot 12: probe...2222completed
PCI bus 20 slot 13: probe...2222completed
PCI bus 20 slot 14: probe...2222completed
PCI bus 20 slot 15: probe...2222completed
PCI bus 20 slot 16: probe...2222completed
PCI bus 20 slot 17: probe...2222completed
PCI bus 20 slot 18: probe...2222completed
PCI bus 20 slot 19: probe...2222completed
PCI bus 20 slot 20: probe...2222completed
PCI bus 20 slot 21: probe...2222completed
PCI bus 20 slot 22: probe...2222completed
PCI bus 20 slot 23: probe...2222completed
PCI bus 20 slot 24: probe...2222completed
PCI bus 20 slot 25: probe...2222completed
PCI bus 20 slot 26: probe...2222completed
PCI bus 20 slot 27: probe...2222completed
PCI bus 20 slot 28: probe...2222completed
PCI bus 20 slot 29: probe...2222completed
PCI bus 20 slot 30: probe...2222completed
PCI bus 20 slot 31: probe...2222completed2022-03-16-else? bus = 0 device = 14 func = 0
2022-03-15 bus = 0 14 0
03-16 reg 0x10 = 0xfffff004
PCI bus 0 slot 14/0: reg 0x10 = 0xfffff004
03-16 memspace size = 0x1000 reg = 0x10 //桥空间
03-16 end for
03-16-2 reg 0x38 = 0x0PCI bus 0 slot 15: probe...2222completed
03-16 dev = 0x8f7ff538 tag = 7800 //system设备
PCI bus 0 slot 15/0: vendor/product: 0x0014/0x7a0f (system, miscellaneous, interface: 0x00, revision: 0x00)
2022-03-16 bus = 0 device = 15 func = 0
2022-03-16-else? bus = 0 device = 15 func = 0
2022-03-15 bus = 0 15 0
03-16 reg 0x10 = 0xffffff04
PCI bus 0 slot 15/0: reg 0x10 = 0xffffff04
03-16 memspace size = 0x100 reg = 0x10 //请求内存空间
03-16 reg 0x18 = 0x0
03-16 reg 0x1c = 0x0
03-16 reg 0x20 = 0x0
03-16 reg 0x24 = 0x0
03-16 end for
03-16-2 reg 0x30 = 0x0PCI bus 0 slot 16: probe...2222completed
03-16 dev = 0x8f7ff538 tag = 8000 //多媒体设备
PCI bus 0 slot 16/0: vendor/product: 0x0014/0x7a16 (multimedia, miscellaneous, interface: 0x00, revision: 0x00)
2022-03-16 bus = 0 device = 16 func = 0
2022-03-16-else? bus = 0 device = 16 func = 0
2022-03-15 bus = 0 16 0
03-16 reg 0x10 = 0xfffffe04
PCI bus 0 slot 16/0: reg 0x10 = 0xfffffe04
03-16 memspace size = 0x200 reg = 0x10 //请求内存空间1
03-16 reg 0x18 = 0xffffff00
PCI bus 0 slot 16/0: reg 0x18 = 0xffffff00
03-16 memspace size = 0x100 reg = 0x18 //请求内存空间2
03-16 reg 0x1c = 0xfffffffe
PCI bus 0 slot 16/0: reg 0x1c = 0xfffffffe
PCI bus 0 slot 16/0: reserved mapping type 0x6
03-16 reg 0x20 = 0xffffff00
PCI bus 0 slot 16/0: reg 0x20 = 0xffffff00
03-16 memspace size = 0x100 reg = 0x20 //请求内存空间3
03-16 reg 0x24 = 0xfffffffe
PCI bus 0 slot 16/0: reg 0x24 = 0xfffffffe
PCI bus 0 slot 16/0: reserved mapping type 0x6
03-16 end for
03-16-2 reg 0x30 = 0xfffffffe //扩展空间
PCI bus 0 slot 16/0: reg 0x30 = 0xfffffffe
PCI bus 0 slot 17: probe...2222completed03-16 dev = 0x8f7ff538 tag = 8800 //多媒体设备
PCI bus 0 slot 17/0: vendor/product: 0x0014/0x7a26 (multimedia, miscellaneous, interface: 0x00, revision: 0x00)
2022-03-16 bus = 0 device = 17 func = 0
2022-03-16-else? bus = 0 device = 17 func = 0
2022-03-15 bus = 0 17 0
03-16 reg 0x10 = 0xffffff04
PCI bus 0 slot 17/0: reg 0x10 = 0xffffff04
03-16 memspace size = 0x100 reg = 0x10 //请求内存空间1
03-16 reg 0x18 = 0xffffff00
PCI bus 0 slot 17/0: reg 0x18 = 0xffffff00
03-16 memspace size = 0x100 reg = 0x18 //请求内存空间2
03-16 reg 0x1c = 0xfffffffe
PCI bus 0 slot 17/0: reg 0x1c = 0xfffffffe
PCI bus 0 slot 17/0: reserved mapping type 0x6
03-16 reg 0x20 = 0xffffff00
PCI bus 0 slot 17/0: reg 0x20 = 0xffffff00
03-16 memspace size = 0x100 reg = 0x20 //请求内存空间3
03-16 reg 0x24 = 0xfffffffe
PCI bus 0 slot 17/0: reg 0x24 = 0xfffffffe
PCI bus 0 slot 17/0: reserved mapping type 0x6
03-16 end for
03-16-2 reg 0x30 = 0xfffffffe //扩展空间
PCI bus 0 slot 17/0: reg 0x30 = 0xfffffffePCI bus 0 slot 18: probe...2222completed
PCI bus 0 slot 19: probe...2222completed
PCI bus 0 slot 20: probe...2222completed
PCI bus 0 slot 21: probe...2222completed
PCI bus 0 slot 22: probe...2222completed
PCI bus 0 slot 23: probe...2222completed
PCI bus 0 slot 24: probe...2222completed
PCI bus 0 slot 25: probe...2222completed
PCI bus 0 slot 26: probe...2222completed
PCI bus 0 slot 27: probe...2222completed
PCI bus 0 slot 28: probe...2222completed
PCI bus 0 slot 29: probe...2222completed
PCI bus 0 slot 30: probe...2222completed
PCI bus 0 slot 31: probe...2222completed
3. 实际的2k1000手册说明:
在用户手册中的说明,基本与打印信息一致。
扫描的信息显示,设备号02是没有的,
而设备号16,17应该也是没有的,但是扫描信息显示有。
4. 对应的代码如下:
注意:这个函数是可能递归调用的。
static void
_pci_query_dev_func (struct pci_device *dev, pcitag_t tag, int initialise)
{
pcireg_t id, class;
pcireg_t old, mask;
pcireg_t stat;
pcireg_t bparam;
int reg;
struct pci_bus *pb;
struct pci_device *pd;
unsigned int x;
int bus, device, function;
int isbridge = 0;
printf("03-16 dev = %p tag = %#x\n",dev,tag);
class = _pci_conf_read(tag, PCI_CLASS_REG);
id = _pci_conf_read(tag, PCI_ID_REG);
if (_pciverbose) {
int supported;
char devinfo[256];
_pci_devinfo(id, class, &supported, devinfo);
_pci_tagprintf (tag, "%s\n", devinfo);
}
pd = pmalloc(sizeof(struct pci_device));
if(pd == NULL) {
PRINTF ("pci: can't alloc memory for device\n");
return;
}
_pci_break_tag (tag, &bus, &device, &function);
printf("2022-03-16 bus = %d device = %d func = %d\n",bus, device, function);
pd->pa.pa_bus = bus;
pd->pa.pa_device = device;
pd->pa.pa_function = function;
pd->pa.pa_tag = tag;
pd->pa.pa_id = id;
pd->pa.pa_class = class;
pd->pa.pa_flags = PCI_FLAGS_IO_ENABLED | PCI_FLAGS_MEM_ENABLED;
pd->pa.pa_iot = dev->pa.pa_iot;
pd->pa.pa_memt = dev->pa.pa_memt;
pd->pa.pa_dmat = dev->pa.pa_dmat;
pd->parent = dev;
pd->pcibus = dev->bridge.secbus;
pb = pd->pcibus;
_pci_device_insert(dev, pd);
/*
* Calculated Interrupt routing
*/
_pci_setupIntRouting(pd);
/*
* Shut off device if we initialize from non reset.
*/
stat = _pci_conf_read(tag, PCI_COMMAND_STATUS_REG);
stat &= ~(PCI_COMMAND_MASTER_ENABLE |
PCI_COMMAND_IO_ENABLE |
PCI_COMMAND_MEM_ENABLE);
#ifdef USE_SM502_UART0
if(device!=14)
{
#endif
_pci_conf_write(tag, PCI_COMMAND_STATUS_REG, stat);
#ifdef USE_SM502_UART0
}
#endif
pd->stat = stat;
/* do all devices support fast back-to-back */
if ((stat & PCI_STATUS_BACKTOBACK_SUPPORT) == 0) {
pb->fast_b2b = 0; /* no, sorry */ //连续传输,一个设备不支持,总线就不支持
}
/* do all devices run at 66 MHz */
if ((stat & PCI_STATUS_66MHZ_SUPPORT) == 0) {
pb->freq66 = 0; /* no, sorry */ //一个设备不支持,总线就不支持
}
/* find slowest devsel */
x = stat & PCI_STATUS_DEVSEL_MASK;
if (x > pb->devsel) {
pb->devsel = x; //x:0表示快速,1表示中等速度,2表示慢速设备
}
/* Funny looking code which deals with any 32bit read only cfg... */
bparam = _pci_conf_read(tag, (PCI_MINGNT & ~0x3));
pd->min_gnt = 0xff & (bparam >> ((PCI_MINGNT & 3) * 8));
bparam = _pci_conf_read(tag, (PCI_MAXLAT & ~0x3));
pd->max_lat = 0xff & (bparam >> ((PCI_MAXLAT & 3) * 8));
if (pd->min_gnt != 0 || pd->max_lat != 0) {
/* find largest minimum grant time of all devices */
if (pd->min_gnt != 0 && pd->min_gnt > pb->min_gnt) {
pb->min_gnt = pd->min_gnt;
}
/* find smallest maximum latency time of all devices */
if (pd->max_lat != 0 && pd->max_lat < pb->max_lat) {
pb->max_lat = pd->max_lat;
}
/* subtract our min on-bus time per second from bus bandwidth */
if (initialise) {
pb->bandwidth -= pd->min_gnt * 4000000 / (pd->min_gnt + pd->max_lat);
}
}
/* Map interrupt to interrupt line (software function only) */
bparam = _pci_conf_read(tag, PCI_INTERRUPT_REG);
bparam &= ~(PCI_INTERRUPT_LINE_MASK << PCI_INTERRUPT_LINE_SHIFT);
bparam |= ((_pci_getIntRouting(pd) & 0xff) << PCI_INTERRUPT_LINE_SHIFT);
_pci_conf_write(tag, PCI_INTERRUPT_REG, bparam);
/*
* Check to see if device is a PCI Bridge
*/
if (PCI_ISCLASS(class, PCI_CLASS_BRIDGE, PCI_SUBCLASS_BRIDGE_PCI)) {
struct pci_device *pcidev;
struct pci_win *pm_mem = NULL;
struct pci_win *pm_io = NULL;
struct pci_win *pm;
pcireg_t tmp;
isbridge = 1;
printf("2022-03-15 device is a PCI Bridge\n");
pd->bridge.pribus_num = bus;
#if 1
_pci_nbus = pci_get_busno(pd, _pci_nbus);
pd->bridge.secbus_num = _pci_nbus;
#else
pd->bridge.secbus_num = ++_pci_nbus;
#endif
/* Set it temperary to same as secondary bus number */
pd->bridge.subbus_num = pd->bridge.secbus_num;
tmp = _pci_conf_read(tag, PCI_PRIBUS_1);
tmp &= 0xff000000;
tmp |= pd->bridge.pribus_num;
tmp |= pd->bridge.secbus_num << 8;
tmp |= pd->bridge.subbus_num << 16;
_pci_conf_write(tag, PCI_PRIBUS_1, tmp);
/* Update sub bus number */
for(pcidev = dev; pcidev != NULL; pcidev = pcidev->parent) {
//printf("pcidev = 0x%x\n", pcidev);
pcidev->bridge.subbus_num = pd->bridge.secbus_num;
tmp = _pci_conf_read(pcidev->pa.pa_tag, PCI_PRIBUS_1);
tmp &= 0xff00ffff;
tmp |= pd->bridge.secbus_num << 16;
if(pcidev->parent)
_pci_conf_write(pcidev->pa.pa_tag, PCI_PRIBUS_1, tmp);
}
pd->bridge.secbus = pmalloc(sizeof(struct pci_bus));
if(pd->bridge.secbus == NULL) {
PRINTF ("pci: can't alloc memory for new pci bus\n");
return;
}
pd->bridge.secbus->max_lat = 255;
pd->bridge.secbus->fast_b2b = 1;
pd->bridge.secbus->prefetch = 1;
pd->bridge.secbus->freq66 = 1;
pd->bridge.secbus->bandwidth = 4000000; //64M
pd->bridge.secbus->ndev = 1;
pd->bridge.secbus->bus = pd->bridge.secbus_num;
_pci_bus_insert(pd->bridge.secbus);
{
extern struct pci_device *_pci_bus[];
extern int _max_pci_bus;
_pci_bus[_max_pci_bus++] = pd;
}
set_pcie_port_type(pd);
/* Scan secondary bus of the bridge */
_pci_scan_dev(pd, pd->bridge.secbus_num, 0, initialise);
/*
* Sum up the address space needed by secondary side of bridge
*/
if(pm_io == NULL) {
pm_io = pmalloc(sizeof(struct pci_win));
if(pm_io == NULL) {
PRINTF ("pci: can't alloc memory for pci memory window\n");
return;
}
pm_io->device = pd;
pm_io->reg = PCI_IOBASEL_1;
pm_io->flags = PCI_MAPREG_TYPE_IO;
}
if(pm_mem == NULL) {
pm_mem = pmalloc(sizeof(struct pci_win));
if(pm_mem == NULL) {
PRINTF ("pci: can't alloc memory for pci memory window\n");
return;
}
pm_mem->device = pd;
pm_mem->reg = PCI_MEMBASE_1;
pm_mem->flags = PCI_MAPREG_MEM_TYPE_32BIT;
}
/* Sum up I/O Space needed */
{
int max=0;
for(pm = pd->bridge.iospace; pm != NULL; pm = pm->next) {
if(max < pm->align)
max = pm->align;
pm_io->size += pm->size;
}
pm_io->size = (pm_io->size + max -1) & ~(max-1);
if(max < 0x1000) max = 0x1000;
pd->bridge.io_mask = ~(max-1);
pm_io->align = max;
}
/* Sum up Memory Space needed */
{
int max = 0;
for(pm = pd->bridge.memspace; pm != NULL; pm = pm->next) {
if(max < pm->align)
max = pm->align;
pm_mem->size += pm->size;
}
pm_mem->size = (pm_mem->size + max -1) & ~(max-1);
if(max<0x100000) max = 0x100000;
pd->bridge.mem_mask = ~(max-1);
pm_mem->align = max;
}
if(pm_io) {
/* Round to minimum granularity requierd for a bridge */
pm_io->size = _pci_roundup(pm_io->size, 0x1000);
_insertsort_window(&pd->parent->bridge.iospace, pm_io);
}
if(pm_mem) {
/* Round to minimum granularity requierd for a bridge */
pm_mem->size = _pci_roundup(pm_mem->size, 0x100000);
_insertsort_window(&pd->parent->bridge.memspace,pm_mem);
}
}
else if (PCI_ISCLASS(class, PCI_CLASS_MASS_STORAGE, PCI_SUBCLASS_MASS_STORAGE_IDE) &&
dev->bridge.secbus->minpciioaddr == 0) {
/*
* There is no need to setup memory regions for IDE storage devices
* but only if PCI/ISA I/O space is accessables
*/
return;
}
//set BAR for this dev
{
int skipnext = 0;
printf("2022-03-16-else? bus = %d device = %d func = %d\n",bus, device, function);
#if defined(LOONGSON_2K) || defined(LS7A)
/* skip bus 0, device 0, function 0 */
if (pd->pa.pa_tag != 0 && !PCI_ISCLASS(class, PCI_CLASS_BRIDGE, PCI_SUBCLASS_BRIDGE_PCI)) {
pcie_write_mps(pd);
pcie_write_mrrs(pd);
}
#endif
printf("2022-03-15 bus = %d %d %d \n",bus, device, function);
for (reg = PCI_MAPREG_START; reg < (isbridge ? PCI_MAPREG_PPB_END : PCI_MAPREG_END); reg += 4) {
struct pci_win *pm;
if (skipnext) { //对于64位的memspace ,跳过一个寄存器
skipnext = 0;
continue;
}
old = _pci_conf_read(tag, reg); //for循环内,reg不断变化,返回的值也是不同的
_pci_conf_write(tag, reg, 0xfffffffe);
mask = _pci_conf_read(tag, reg);
_pci_conf_write(tag, reg, old); //返回的mask用来判断分配什么类型空间。
//有些寄存器mask为0,表示不需要分配,直接跳过
if (mask == 0 || mask == 0xffffffff) {
continue;
}
if (_pciverbose >= 3) {
_pci_tagprintf (tag, "reg 0x%x = 0x%x\n", reg, mask);
}
if (PCI_MAPREG_TYPE(mask) == PCI_MAPREG_TYPE_IO) { //最低位为1,表示io空间
//for IO bar, device is free to hardwire high 16 bits to zero, here we mask high 16 bits to all 1
//for convenience of size calculation
mask |= 0xffff0000;
pm = pmalloc(sizeof(struct pci_win));
if(pm == NULL) {
PRINTF ("pci: can't alloc memory for pci memory window\n");
return;
}
pm->device = pd;
pm->reg = reg; //起始地址?
pm->flags = PCI_MAPREG_TYPE_IO;
pm->size = -(PCI_MAPREG_IO_ADDR(mask));
pm->align = pm->size;
_insertsort_window(&pd->parent->bridge.iospace, pm);
printf("03-16 iospace size = 0x%x reg = 0x%x\n",pm->size,reg);
}
else { //内存空间
switch (PCI_MAPREG_MEM_TYPE(mask)) {
case PCI_MAPREG_MEM_TYPE_32BIT:
case PCI_MAPREG_MEM_TYPE_32BIT_1M:
break;
case PCI_MAPREG_MEM_TYPE_64BIT:
_pci_conf_write(tag, reg + 4, 0x0);
printf("03-16 PCI_MAPREG_MEM_TYPE_64BIT\n");
skipnext = 1; //两个32位当一个,接下的那个32位也用了
break;
default:
_pci_tagprintf (tag, "reserved mapping type 0x%x\n",
PCI_MAPREG_MEM_TYPE(mask));
continue;
}
if (!PCI_MAPREG_MEM_PREFETCHABLE(mask)) {
pb->prefetch = 0;
}
pm = pmalloc(sizeof(struct pci_win));
if(pm == NULL) {
PRINTF ("pci: can't alloc memory for pci memory window\n");
return;
}
pm->device = pd;
pm->reg = reg;
pm->flags = PCI_MAPREG_MEM_TYPE_32BIT;
pm->size = -(PCI_MAPREG_MEM_ADDR(mask));
pm->align = pm->size;
_insertsort_window(&pd->parent->bridge.memspace, pm);
printf("03-16 memspace size = 0x%x reg = 0x%x\n",pm->size,reg);
}
}
printf("03-16 end for\n");
{ //扩展存储空间,一般没有使用到。
/* Finally check for Expansion ROM */
reg = isbridge ? PCI_MAPREG_PPB_ROM : PCI_MAPREG_ROM;
old = _pci_conf_read(tag, reg);
_pci_conf_write(tag, reg, 0xfffffffe);
mask = _pci_conf_read(tag, reg);
_pci_conf_write(tag, reg, old);
printf("03-16-2 reg 0x%x = 0x%x\n", reg, mask);
if (mask != 0 && mask != 0xffffffff) {
struct pci_win *pm;
if (_pciverbose >= 3) {
_pci_tagprintf (tag, "reg 0x%x = 0x%x\n", reg, mask);
}
pm = pmalloc(sizeof(struct pci_win));
if(pm == NULL) {
PRINTF ("pci: can't alloc memory for pci memory window\n");
return;
}
pm->device = pd;
pm->reg = reg;
pm->size = -(PCI_MAPREG_ROM_ADDR(mask));
pm->align = pm->size;
_insertsort_window(&pd->parent->bridge.memspace, pm);
}
}
}
}
5. 实际使用的原理图上,看到确实是在pcie-port0端口有连接设备,其他无连接。