MTK76X8基于SDK OpenWrt添加UART驱动

1、硬件设明。

2. kernel配置

#make kernel_menuconfig          

    添加/dev/ttyS2设备（原来只有ttyS0, ttyS1）

   Device Drivers  --->  

   Character devices  --->

  Serial drivers  --->

    （3）Number of 8250/16550 serial ports to register at runtime

3、配置GPIO1 MODE寄存器，把相关复用io口配置为uart功能。

openwrt-sdk$ vim build_dir/target-mipsel_24kec+dsp_uClibc-0.9.33.2/linux-ramips_mt7628/linux-3.10.14/drivers/char/ralink_gpio.c

ralink_gpio_init()

{

    gpiomode |= RALINK_GPIOMODE_DFT;

     gpiomode &= ~0xf000000;  //zhouwu 20170330 add  

    *(volatile u32 *)(RALINK_REG_GPIOMODE) = cpu_to_le32(gpiomode);

}

4、配置串口

#openwrt-sdk$ vim build_dir/target-mipsel_24kec+dsp_uClibc-0.9.33.2/linux-ramips_mt7628/linux-3.10.14/arch/mips/ralink/init.c

serial_init(57600);

prom_init_serial_port();

添加uart2初始化配置：

serial_setbrg()

{

#if defined (CONFIG_RALINK_MT7621) || defined (CONFIG_RALINK_MT7628)

        IER(RALINK_SYSCTL_BASE + 0xD00) = 0;

        FCR(RALINK_SYSCTL_BASE + 0xD00) = 0;

        LCR(RALINK_SYSCTL_BASE + 0xD00) = (UART_LCR_WLEN8 | UART_LCR_DLAB);

        DLL(RALINK_SYSCTL_BASE + 0xD00) = clock_divisor & 0xff;

        DLM(RALINK_SYSCTL_BASE + 0xD00) = clock_divisor >> 8;

        LCR(RALINK_SYSCTL_BASE + 0xD00) = UART_LCR_WLEN8;

      IER(RALINK_SYSCTL_BASE + 0xE00) = 0;

      FCR(RALINK_SYSCTL_BASE + 0xE00) = 0;

      LCR(RALINK_SYSCTL_BASE + 0xE00) = (UART_LCR_WLEN8 | UART_LCR_DLAB);

     DLL(RALINK_SYSCTL_BASE + 0xE00) = clock_divisor & 0xff;

    DLM(RALINK_SYSCTL_BASE + 0xE00) = clock_divisor >> 8;

    LCR(RALINK_SYSCTL_BASE + 0xE00) = UART_LCR_WLEN8;

#else

 static struct uart_port serial_req[3];

prom_init_serial_port()

{

  memset(serial_req, 0, 3*sizeof(struct uart_port));

~

~

serial_req[1].membase    = ioremap_nocache(RALINK_UART_LITE_BASE, PAGE_SIZE);

#if defined CONFIG_RALINK_MT7628

  serial_req[2].type    = PORT_16550A;

 serial_req[2].line    = 2;

 serial_req[2].irq     = SURFBOARDINT_UART_LITE3;

 serial_req[2].flags   = UPF_FIXED_TYPE;

 serial_req[2].uartclk         = 40000000;

 serial_req[2].iotype  = UPIO_MEM32;

serial_req[2].regshift        = 2;

serial_req[2].mapbase         = RALINK_UART_LITE3_BASE;

serial_req[2].membase         = ioremap_nocache(RALINK_UART_LITE3_BASE, PAGE_SIZE);

#endif  

  early_serial_setup(&serial_req[0]);

  early_serial_setup(&serial_req[1]);

 early_serial_setup(&serial_req[2]);

  return(0);

}

红色是添加与修改的内容，重新编译openwrt工程升级固件。

5、测试方法
运行： echo "0123456789ABCD" > /dev/ttyS0
UART1输出：0123456789ABCD
默认波特率是：9600