串口设置

最新推荐文章于 2023-05-06 14:15:45 发布

zzobin

最新推荐文章于 2023-05-06 14:15:45 发布

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分类专栏： linux uboot

本文链接：https://blog.csdn.net/zzobin/article/details/12494949

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一、关于串口设置

1.uboot阶段的设置
在uboot/board/samsung/smdkc210/lowlevel_init.S文件里
.globl uart_asm_init
uart_asm_init:

/* set GPIO to enable UART */
@ GPIO setting for UART for UART0/1
ldr r0, =0x11400000
ldr r1, =0x22222222
str r1, [r0]
ldr r0, =0x11400020
ldr r1, =0x222222
str r1, [r0]

ldr r0, =CMU_BASE @0x1003_0000
ldr r1, =CLK_SRC_PERIL0_VAL @0x666666
ldr r2, =CLK_SRC_PERIL0_OFFSET
str r1, [r0, r2]
ldr r1, =CLK_DIV_PERIL0_VAL @0x777777
ldr r2, =CLK_DIV_PERIL0_OFFSET
str r1, [r0, r2]

ldr r0, =ELFIN_UART_CONSOLE_BASE @0xEC000000
ldr r1, =0x111
str r1, [r0, #UFCON_OFFSET]

mov r1, #0x3
str r1, [r0, #ULCON_OFFSET]

ldr r1, =0x3c5
str r1, [r0, #UCON_OFFSET]

ldr r1, =UART_UBRDIV_VAL @0x2B /* UDIV(43) = ((82,500,000 / 16 / 115200) - 1) */
str r1, [r0, #UBRDIV_OFFSET]

ldr r1, =UART_UDIVSLOT_VAL @0xC /* UFRACVAL(12) = ((((82,500,000 / 16 / 115200) - 1) - 43) * 16) */
str r1, [r0, #UDIVSLOT_OFFSET]

ldr r1, =0x4f4f4f4f
str r1, [r0, #UTXH_OFFSET] @'O'

mov pc, lr
这里主要关注下UART_UBRDIV_VAL和UART_UDIVSLOT_VAL(UFRACVALn)两个寄存器设置。设置如下：
You can use the value stored in the Baud-rate divisor (UBRDIVn) and divisor fractional value (UFRACVALn)
to determine the serial Tx/Rx clock rate (Baud rate) as:
DIV_VAL = UBRDIVn + UFRACVALn/16
or
DIV_VAL = (SCLK_UART/(bps x 16)) - 1
Where, the divisor should be from 1 to (216 – 1).
By using UFRACVALn, you can generate the Baud rate more accurately.
For example, if the Baud rate is 115200 bps and SCLK_UART is 40 MHz, UBRDIVn and UFRACVALn are:
DIV_VAL = (40000000/(115200 x 16)) – 1
= 21.7 – 1
= 20.7
UBRDIVn = 20 (integer part of DIV_VAL)
UFRACVALn/16 = 0.7
Therefore, UFRACVALn = 11
在上面SCLK_UART=82,500,000Hz。如果想设置较高波特率，可以更改UBRDIVn和UFRACVALn的值。

uboot阶段串口选择在uboot/include/configs/tc4_android.h里：
/*
* select serial console configuration
*/
#ifndef CONFIG_TA4
#define CONFIG_SERIAL2 1 /* we use UART1 on SMDKC210 */
#else
#define CONFIG_SERIAL3 1 /* we use UART2 on TA4 */
#endif

2.kernel阶段的设置
在Kernel Configuration文件里，修改
CONFIG_CMDLINE="console=ttySAC2,115200"
前面串口port，后面是波特率

二、Uart0的cts,rts的配置
即硬件流控设置
1.在uboot里搜索CONFIG_HWFLOW,在seril.c(README.Modem文件里有说明).
2.在Exynos 4412 SCP这份datasheet的28.3.3和28.3.4章节有关于cts,rts等说明。

注：目前uboot编译后由于没有key，不能运行。上面内容供参考。