http://www.cs.umd.edu/class/sum2003/cmsc311/Notes/
© 2003, 2004. All notes linked here are copyrighted by CharlesLin, with all rights reserved.
Some condensed notes on building a computer.
Errata
Here is the list of errata.Course Philosophy
- Why learn computer organization? (forthcoming)
- How this course is being organized (forthcoming)
Being a Better Student
- Active learning in the classroom (3/12/03)
- How to read a book (4/05/03)
- The "web" and geek web sites (3/16/03)
- Thoughts on Programming (3/16/03)
- Virtual Bookshelf: What's onYour Shelf? (3/16/03)
- Student Manifesto: What I'm Owed (4/05/03)
- Big Ideas in Computer ScienceNEW (6/18/03)
- Teaching and Learning: Explaining To Yourself
- Attention to Detail
Baby Computer Organization
- Quick overview of a computer systemREVISED (6/24/03)(6/9/03)
- Abstaction and Computer Organization (forthcoming)
- What's a Wire (6/9/03)
- What's a Bus? (3/17/03) (6/9/03)
- What's a Clock? (4/12/03)
- What's a Register? (4/12/03)
- What's a Tri-State Buffer?NEW (7/1/03)
- Black Boxes
- Simple Model of Memory (3/30/03)
- What's in Your CPU? (forthcoming)
- What's an ISA? (3/17/03)
- Quick overview of MIPS architecture (forthcoming)
- A Toy MIPS program (forthcoming)
- Fetch, Execute, DecodeUPDATED, 6 steps (7/1/03) (3/16/03)
Baby Combinational Circuits
- Overview of Baby Combinational Circuits
- Baby MUX
- Baby DeMUX
- Baby Encoder
- Baby Decoder
Data Representation/Number Conversion
- Overview of Data Representation
- Representation Vs. ValueREVISED (2/7/04) [REVISED (6/17/03),(7/1/03)] (2/24/03)
- Information = Bits + ContextNEW (6/17/03)
- Overview of Converting Integer Representations
- Converting from Base K to Base 10 (2/8/03)
- Converting from Base 10 to Base K (2/9/03)
- Converting Fractions from Base 10 to Base K (2/9/03)
- Bits, Bytes, and Nybbles (6/2/03) (was (2/9/03))
- Big and Little Endian (2/9/03)(3/10/03)
- Word Alignment (2/22/03)
- Integer Representations
- Unsigned Binary (2/24/03)
- Overview of Signed Integers (2/24/03)
- Signed Integers: Signed Magnitude (2/24/03)
- Signed Integers: One's Complement (2/24/03)
- Signed Integers: Two's Complement [REVISED (2/7/04)] (2/24/03)
- Signed Integers: Excess/Bias Representation (2/24/03)(3/15/03)
- Sign Extension (3/5/03)
- Overflow (3/5/03)
- Rob's View of Right-Shifting in 2C (3/16/03)
- Fixed Point Representation (forthcoming)
- IEEE 754: Floating Point (3/8/03)
- Underflow (3/16/03)
- Character Representation: ASCII, EBCDIC, and Unicode (3/6/03)
- The dual nature ofchar (3/15/03)
Low-Level C Operators and More
- Writing numbers in hex and octal in C (3/8/03)
- Bitwise Operators (2/26/03)
- The "magic" of XOR (3/8/03)
- Bitshift Operators (3/8/03)
- Code Example: Is a Bit i Set? (3/10/03)
- Code Example: Is Any Bit Set Within a Range? (3/11/03)
- Code Example: How to Set a Bit (3/11/03)
- Ascii vs Binary Files (3/12/03)
- Casting (3/16/03)
- Pointer ArithmeticNEW (6/24/03)
Binary Arithmetic
- Adding Unsigned NumbersNEW (6/23/03)
- Adding Two's Complement NumbersNEW (6/23/03)
- Creating a One Byte Floating Point NumberREVISED (7/6/03) (6/23/03)
- Adding Floating Point NumbersNEW (7/6/03)
- Multiplying Floating Point NumbersNEW (7/6/03)
MIPS ISA Programming
- Introduction to MIPS (3/28/03)
- Instructions
- Instruction Format overview (3/27/03)
- add, sub (3/28/03)
- addi (3/28/03)
- MIPS Bitwise instructions (3/28/03)
- MIPS Bitshift instructions (sll, sllv, slr, slrv) (3/28/03)
- load and store (3/29/03)
- Pseudoinstructions (3/30/03)
- Conditional and Unconditional Jumps (3/29/03)
- Pseudoinstructions and Branches (3/29/03)
- How to Load a 32 bit ImmediateUPDATED (6/23/03)(3/29/03)
- Integer Multiplication and DivisionNEW (6/23/03)
- Summary of Instruction EncodingUPDATED (6/23/03)
- Summary of Addressing Modes in MIPSUPDATED (6/24/03)(3/30/03)
- Translating C-code to MIPS
- Why Translate C to MIPS Assembly? (3/30/03)
- Implementing Conditional Statements (3/30/03)
- Implementing Loops (3/30/03)
- Understanding 1D Arrays (forthcoming)
- Understanding 2D and Higher Dimensional Arrays (forthcoming)
- Subroutines in MIPS
- Alternate Register Names (6/11/03)
- Understanding the StackNEW (6/22/03)
- Implementing Subroutines/Functions in MIPSNEW (6/22/03)
- Case Study: Simple FunctionNEW (6/23/03)
- Data and Text SegmentsNEW (6/23/03)
- Case Study: ArraysNEW (6/23/03)
- Case Study: Recursive FunctionsNEW (6/24/03)
- How a MIPS Assembler Handles Labels (forthcoming)
- MIPS View of Memory (forthcoming)
Building a Computer
- Fetch, Execute, Decode in Detail (forthcoming)
- Register File as a Black BoxNEW (7/1/03)
- Implementing a Register FileNEW (7/2/03)
- ALU (4/05/03)
- Executing R-type instructions (forthcoming)
- Executing I-type instructions (forthcoming)
- Executing J-type instructions (forthcoming)
- Control Units (forthcoming)
Combinational Logic
(6/17/03) I changed the notation for negationfrom x' to \x. This was done because ' (prime) ishard to read, and backslash is easier to see.- Boolean Functions/Truth TablesREVISED (6/17/03) (3/24/03)
- Basic Logic GatesCLEANED UP (6/17/03) (3/24/03)
- Implementing Boolean FunctionsREVISED (6/28/03) (3/26/03)
- Functional Completeness (3/27/03)
- Black Boxes (4/11/03)
- Multiplexers/Demultiplexers (4/19/03)
- Half Adders/Full Adders/Ripple Carry Adders (4/12/03)
- MUX trick: Implemeting Truth Tables (4/19/03)
- ROM trick: Implemeting Truth Tables with Multiple Outputs (4/19/03)
- Overflow Detection for Adders (4/19/03)
- Fast Addition: Carry Lookahead Adders (4/21/03)
- Implementing a 1-bit ALU (4/19/03)
- Encoders/Decoders (4/20/03)REVISED (6/28/03)
- Decoder/Encoder Trick: Implementing Permutations, etc. (4/21/03)
- MUX Case Studies
- Case Study: Implementing a 5-1 MUXNEW (6/28/03)
- Case Study: Implementing a 8-1 MUXNEW (6/28/03)
- Thoughts on Learning By ExampleNEW (6/28/03)
- Summary of Output Equations for Common Combinational Logic CircuitsNEW (6/28/03)
- Shifters/Circular Shifters (forthcoming)
- Programmable Logic Array (PLA) (5/17/03)
Sequential Logic
- What is State? (4/22/03)
- Difference between Combinational and Sequential Logic (4/22/03)
- Introduction to Flip Flops: D and T (4/30/03)
- Parallel Load Registers (4/30/03)
- Asynchronous Counters (5/1/03)
- Finite State Machines with Output (Mealy and Moore Machines) (5/4/03)
- Excitation Tables for D and T Flip FlopsNEW (6/28/03)
- Implementing Mealy and Moore MachinesREVISED (6/28/03) (6/26/03)
- Why Finite State Machines?
- Case Study: Three State Synchronous CountersNEW (6/27/03)
- Equivalence of D and T flip flopsNEW (6/27/03)
Memory
- Interleaved Memory (5/16/03)
- Cache
- Page and Offset (forthcoming)
- Introduction to CachesUPDATED (7/7/03)(5/16/03)
- Fully Associative CachesUPDATED (7/8/03)(5/16/03)
- Direct Mapped Caches (5/16/03)
- Set Associative Caches (5/16/03)
- Avoiding Pitfall: Addresses vs. SlotsNEW (7/6/03)
- Direct Memory Access (DMA) (5/16/03)
- Virtual MemoryNEW (7/6/03)
I/O
- Memory Mapped I/ONEW (7/6/03)
- External InterruptsNEW (7/6/03)
- PollingNEW (7/6/03)