Chapter 26 Operational Amplifiers II

Chapter 26 Operational Amplifiers II

上一章介绍了可以用fully-differential op-amp来抑制charge injection and clock feedthrough. 这一章就来介绍fully-differential op-amp, 其需要common-mode feedback
(CMFB), CMFB确保op-amp输出电压balanced在一个固定电压(例如VDD/2)

Biasing for Power and Speed

For high-speed design, 我们需要minimum channel length, 但是会减小MOS output resistance, 变差mismatch.

为了low power design, 我们需要减小bias 电流, 这也和high-speed design相违背. low biasing current means low override voltage, means slower circuits.

For general analog design, we set the overdrive voltage to 5% of VDD. For high-speed design, we might set the overdrive voltage to 10% of VDD or larger.

一般来说, 我们把overdrive电压设在5% VDD, 对于高速设计,把overdrive设在10% VDD.

Device Characteristics

It’s important to note that adjusting the width and overdrive are our two “knobs” used to meet a design’s specifications.

调节管子width和overdrive (Vgs-Vth)是我们可以用的两个手段.

Basic Concepts

Modeling Offset

we’ll use a VOS of 50 mV (5% of VDD or roughly 20% of the threshold voltage). 在输入端加入50mV的offset.

A Diff-Amp

第一级输入会放大offset.

A Single Bias Input Diff-Amp

Figure 26.7 shows a diff-amp that generates its own bias reference for the PMOS devices.

The Diff-Amp’s Tail Current Source

我们没有用cascode tail current source是因为没必要, 对于全差分运放, the input common-mode voltage of the op-amp is constant (= VCM), 因此common-mode rejection ratio(CMRR)就不那么重要了.

Using a CMFB Amplifier

下图的CMFB形成负反馈环路, 把Output钳位在Vbiasp.

一种CMFB实现方法如下图所示. 当输出Output=Vbiasp, M1和M2流过电流为20uA

当Output上升(+增加), M2电流变小, M1变小, 而流过Vbiasp的PMOS电流变大, VCMFB变大. 形成负反馈来降低Output.

为了稳定CMFB环路, 我们可以在Output处加Cap(即inputs to the CMFB amplifier)

在加入input offset后, CMFB并不能很好控制output到Vbiasp. 因为在全Output voltage range CMFB钳位效果一般.

We must use a CMFB circuit that can balance the outputs over the entire range of diff-amp output voltages.

我们需要设计可以控制全输出电压范围的CMFB电路.

Compensating the CMFB Loop

考虑下图full-differential op and CMFB

the unity-gain frequency of the CMFB loop:
$$f_{un,cm}=\frac{A_{cm}\cdot g_{mn}}{2\pi C_L}$$
为了保持CMFB loop稳定, 我们需要加大 diff-amp的cap. 否则只能减小CMFB loop gain.

Fig.26.13我们用了diode-connected load to reduce the gain.

为了减小CMFB loop gain, 可考虑下图Fig.26.13. 这样CMFB只控制一半的tail current gate, gain会减小一半. 另外的手段就是调整CMFB transistor size来减小CMFB loop gain了.

Extending the CMFB Amplifier Input Range

我们希望CMFB在所有输出范围都能工作, 考虑下图的电路

a) 电阻平均了输出, b)为实际应用. 需要注意, 这种架构适合op-amp output 有buffer, 因此可以drive resistive load. 另外注意resistor会引入寄生电容.

Dynamic CMFB

可以用switched-capacitor (SC)来做CMFB,

Basic Op-Amp Design

The Differential Amplifier

cascode load diff-amp 如下图所示, Vgs=400mV, Vdsat=100mV

其Gain为40.

Adding a Second Stage (Making an Op-Amp)

下图为2-stage op-amp, 第二级为Class AB. 输出电压约为Vbiasp.

CMFB Amplifier

CMFB gain为0.3, op-amp gain为25, CMFB loop’s overall gain is only around 7. 没办法精准regulate output.

The Two-Stage Op-Amp with CMFB

上图为两级op-amp带CMFB, 问题是输出swing为200mV-800mV, 不能rail-to-rail.

原因在于输出被NMOS和mirror 钳位住, Vop=VgsNMOS, 要增大Vout, 只能增大mirror current以增大 VgsNMOS, 但是电流是有限的.

解决方法: 可以加入MOS作为resistor, 这样output就能自由移动了

Using MOSFETs Operating in the Triode Region

也可以在CMFB用triode-operating MOSFETs, 潜在问题就是gain可能较小.

Making the Op-Amp More Practical

A good “rule-of-thumb” is for the fixed current flowing in the CMFB-controlled bias circuit to be 25–50% of the total expected current.

CMFB bias大体设计在25-50% of total current.

可以添使用gain-enhancement (GE) techniques来增加op-amp的gain, 但是concern是加入op-amp的input common-mode range, 而且需要注意CMFB stability.

一个用MOS-triode MODE作为CMFB**(好)**的电路如下图所示, 注意我们把MOS的尺寸做的很大(80/1), 确保处于triode-region

Op-Amp Offset Effects on Outputs

考虑Op-amp的input offset, 如下图所示

输出offset可以这样估计

Op-Amp Design Using Switched-Capacitor CMFB

可以用switched-capacitor (SC)做CMFB, 但需要注意SC的一些问题.